Forum Post: RE: Triggering Shared Peripheral Interrupts of ARM Corepac from...
Alphan,May I ask which Timer event you are trying to generate to ARM core please? Are you configuring the Timer in general purpose mode please?Please note Timer 0~7 are dedicated to DSP CorePacs when...
View ArticleForum Post: RE: DSP C6457 EMIFA boot through Altera FPGA DPRAM
Hello,The format that your FPGA DP-RAM supports should be present in the related documentation of your FPGA. To my knowledge, they do support the Intel Hex format (.hex) and you can use the TI hex...
View ArticleForum Post: RE: McBSP example in C6657
Zhengtian,There is one McBSP/EDMA example on page 2 of the following thread, using McBSP CSL ported from other device to...
View ArticleForum Post: RE: Multicore Boot Issue on 6670
David,Thanks for your reply, that is pretty much what we are doing, here is what we are doing associated with your suggestions.1) The code loaded (for the other cores) are in DDR3 memory or the first...
View ArticleForum Post: Programming ARM & DSP Cores in DM816x
Hey guys,Does the SW that TI provides for DM816x give the customer the ability to program both cores independently in the Davinci part (ARM core and DSP)?Thanks,Sean
View ArticleForum Post: RE: 512MB memory map config for DM814x
Hi, In case this helps others, the solution to this issue is the firmware_loader command line option to disable i2c support. Since we don't use the tvp encoder -i2c 0 needed to be passed to the...
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Forum Post: RE: How to config SRIO with this certain situation?
Hi David,The SRIO peripheral on the C6678 has 4 SerDes lanes available for use. More description can be found in section 2.3.1.4 SerDes Configuration Example and 3.17.10 PLM Port(n) Path Control...
View ArticleForum Post: DM388 evaluation board options
I see on the DM388 product page a reference to the DM388 IP Camera Reference Design from Appro. Is the Appro design 'the official' TI EVM for the DM388 or is TI going to produce a standard EVM like...
View ArticleForum Post: RE: question about the *.cfg file of JPEG2K Encoder on C66x
Hi Wang, as I can see the EDMA global configuration params is defined on Frame Components edma3lld_cfg.h file (C:\Program Files\Texas...
View ArticleForum Post: RE: Configuration of device based on am1806
HI Miroslav,Hope you’ve already checked the power and clock signal .Then place the device in the emulation mode and try connecting the board to the CCS via JTAG to make sure you are establishing the...
View ArticleForum Post: RE: OMAPL138's VPIF raw capture
Hi Mark Duda, I am trying to interface OV2643 to OMAPL13X. I'm able to read the product id of the device via I2C.The signals outputted by Vsync and Href lines are in...
View ArticleForum Post: RE: VPIF configuration for raw capture
Hi Jagadish Kavalath, Thanks for your suggestion,I am trying to interface OV2643 to OMAPL13X. I'm able to read the product id of the device via I2CThe signals outputted by Vsync and Href lines...
View ArticleForum Post: RE: VPIF Interrupts
Hi Sriharsha Rao, I am trying to interface OV2643 to OMAPL13X. I'm able to read the product id of the device via I2CThe signals outputted by Vsync and Href lines are in accordance with...
View ArticleForum Post: Issue recreating UBIFS keystone-evm-ubifs.ubi
Using the latest (1.5) mtd-utils from git://git.infradead.org/mtd-utils.git I have tried to use the sdk (3.00.03.15) images to simply recreate the base ubi filesystem.After decompressing the cpio.gz...
View ArticleForum Post: Where is the port data combined on VPIF ?
Hi,Can somebody do mention as to where the Video port data formed after combining the data lines is available in OMAPL13X ?
View ArticleForum Post: RE: DM365 PLL settings
Hi Jan,On page 148 of SPRUFG5A (Section 9.12.19 Peripheral Clock Control) the description for the ARMCLKS field states that:When changing the source clock (either 0 to 1 or 1 to 0), ARM926 clock...
View ArticleForum Post: RE: Compairing C6657 and C6672: which is better?
Hi Joe,I wanted to comment on a statement you made earlier in this thread regarding the TCP/VCP accelerators that the C6657 has.“The C6657 Coprocessor has one TCP3d and two VCP2. Briefly looking over...
View ArticleForum Post: RE: Where is Technical Reference Manual Available for OMAP-L1x,...
Hi Robert,Try - spruh77a.pdf - OMAP-L138 DSP+ARM Processor Technical Reference Manual or spruh79a.pdf - TMS320C6748 DSP Technical Reference Manual,Thanks,HR
View ArticleForum Post: RE: Use EMIF16 as interface for FPGA
Hi Joe,See the note below that table: E = 1/SYSCLK7 which is the CPU/6 clock that runs the EMIF16 module.Typically you should be able to find the read/write cycle times and component setup/hold times...
View ArticleForum Post: RE: Max Bandwidth of EMIF 16 for TMS320C6657 to FPGA?
Joe,Please see the other thread for this answer: RE: Use EMIF16 as interface for FPGA
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