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Forum Post: RE: Use EMIF16 as interface for FPGA

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Hi Joe,

See the note below that table: E = 1/SYSCLK7 which is the CPU/6 clock that runs the EMIF16 module.

Typically you should be able to find the read/write cycle times and component setup/hold times for your memory device in its datasheet and calculate the components to program accordingly.

For a good example on how this is done, please see the Appendix section (A.2.2.1) of this document: http://www.ti.com/lit/ug/sprufl6f/sprufl6f.pdf

Although it is a different TI device, it uses the same async controller as the 6655/57. You may find it useful and we will try to include that in our 6655/57 collateral.


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