Hi Joe,
I wanted to comment on a statement you made earlier in this thread regarding the TCP/VCP accelerators that the C6657 has.
“The C6657 Coprocessor has one TCP3d and two VCP2. Briefly looking over the Hardware Manual for the C6672 it looks like these decoder/encoder is built-in to the core. So the only major differenct between the C6657 and C6672 is the Network Coprocessor block.”
The C667x does not have the TCP or VCP accelerators, and they are not built-in to the C66x core. I see the section in the data sheet that mentions them when discussing the EDMA, but we have determined that this is an error in the data sheet, which will hopefully be removed soon.
This VCP and TCP inclusion is a major difference between the two parts and if you’re looking for Turbo or Viterbi decode capability, I would recommend the C665x part.
If you haven’t already seen them, the power estimator spreadsheets for each device should be useful for you: http://www.ti.com/lit/zip/sprm560 and http://www.ti.com/lit/zip/sprm600.
Since you mentioned that you’re looking at these parts for RADAR algorithms I wanted to also point out the paper we have discussing a Synthetic Aperture Radar implementation on the C6678 device. It can be found at: http://ieee-hpec.org/2012/index_htm_files/Wang_Dan.pdf
Thanks,
Ellen