Forum Post: RE: Better explanation for DEI 'enableDualVipOut'
DeInterlaced Link gives two output, one is in YUV422 format and other could be YUV420 output from VIP. But VIP can itself provide two outputs, so this flag enabled two outputs from VIP, so when...
View ArticleForum Post: RE: DM8168 McFW/Link API with one HDMI and two channel SD outputs
ok, that looks correct, please make sure you are using the settings that has been shared on that link. Rgds,Brijesh
View ArticleForum Post: SPI Example
Dears,I'm working on the TMS320C6670 Evaluation Module DSP which I want to interface with another kit via SPI.I have read the document of the SPI and I was searching a lot about examples for it but I...
View ArticleForum Post: RE: Turn off M3(HDVPSS/HDVICP) in Low Power Mode
Hi Brijesh,Thanks for responding it is really helpful.But our need is during the run-time, what we are planning is, when the system is idle we want to put our system to sleep or hibernate (same...
View ArticleForum Post: Function can not be executed
When I perform the Derivative function , the program was terminated and has an abort: no frame information...Assembly code as below 190 Derivative(t, x, d, m); 88000510: BC4D LDW.D2T2 *B15[1],B4...
View ArticleForum Post: RE: Error exists when I build the test example for jpeg2k encoder
thanks all answers, in fact, it's my fault, I installed j2e and j2d in the path "C:\Program Files (x86)\ti....". After Ire-install them in the path "C:\ti\...", errors missing.
View ArticleForum Post: Decrease McASP Transmit/Receive Clock
I'm developing on OMAP-L137Below are the McASP transmit setting./* TX */ mcasp->regs->XMASK = 0xffffffff; // No padding used mcasp->regs->XFMT = 0x00008078; // MSB 16bit, 1-delay, no pad,...
View ArticleForum Post: RE: DVO2 output in IPNC RDK 3.8.0
Hi Brijesh,As u suggested to stop the vencs first, i put the following lines of code in ipnc_rdk/ipnc_mcfw/mcfw/src_linux/mcfw_api/ti_vdis.c fileChanges :-#if defined (TI_8107_BUILD) //Original Code...
View ArticleForum Post: DSP Test Integration Toolkit
I see some Information literature said DSP could communicate with DSP in RTDX model. I also view the NI net for some information. it seems that if i want to use LabVIEW to communicate with DSP wiht...
View ArticleForum Post: Keystone II VID value
Other than using the VCNTL hardware pins, is there a way to determine what the VID value (6 bit code) is for a particular Keystone II device? For example, is it stored in a register within the...
View ArticleForum Post: about dm8168 hdvpss, Why not sync？
my platform is dm8168+TVP5158, based on DVRRDK4.0.now, dsp need receive two channels(eg:ch0, ch1, ch0 ch1 connect the same TVP5158) video data that from TVP5158 in the same time. so check (struct...
View ArticleForum Post: RE: Echo cancelation software
I am using EZDSP5505 USB STICK, I can't find CCS4 library functions for 5505 processor, so I can not write code alone. How do I get the library functions for GPIO and Audio interface for this kit?
View ArticleForum Post: C6472 - clarification on EDMA maxwait and SRIO DMA maxwait
HiThis relates to a post on CPU vs SRIO priority to L2. But in this case, its EDMA vs SRIO priority to DDR.http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/439/p/254392/1182136.aspx#1182136I'd...
View ArticleForum Post: RE: C6472 SRIO (aka RapidIO) Packet Retrys when FPGA sends data...
Note: I posted a related question on http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/439/t/338934.aspx
View ArticleForum Post: how to use DMA to opration FVID2_FRAME
Hi all I am using DVRRDK_04.01.00.02 with DM8168X_UD_DVR.I have a problem:there is a FVID2_FRAME inFrame and a FVID2_FRAME outFrame ,inFrame video date reslution is 3840x2160 ，how to use...
View ArticleForum Post: RE: Issue about decoding interlaced video
Thanks Nara,How to know(calculate) exactly the value of numBufPerCh and displayDelay. Maybe that value only correct for my case but not sure correctness for an other case. Now my decoder can work but...
View ArticleForum Post: RE: dm8168 DVR_RDK 4.0 running problem, program exception handling
Only after alg is enabled, exception happens.
View ArticleForum Post: RE: dm8168 dvrrdk 4.0 sometimes decode error
Error happens only when I do some operation like disabling channel.
View ArticleClik here to view.
Forum Post: 66AK2H EMIF16 address generation
Hello,I am planning EMIF16 to connect FPGA.Question) When C66x/ARM access EMIF16 by 32bit, lower address is always generated first. Is that right? If there is any cases EMIF16 generates higher...
View ArticleForum Post: RE: 66AK2H EMIF16 access
Bill-san,Sorry, my question was confusing.I would like to close this post.Instead, I posted another thread:http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/338950.aspxBest regards, RY
View Article