Forum Post: RE: DVO2 output in IPNC RDK 3.8.0
Sunny, This could fail only if the passes standard mode (non custom) is not supported. From the tree, it looks like you are passing the 10080p60, which is supported, but somehow it looks like this...
View ArticleForum Post: RE: How to configure dm8168 to support 24-bit vout output display...
Hi, This is correct way, but dvr-rdk might be overwriting these settings. please check the displayctrl.c file in dvr-rdk, this file reconfigures dvor output using SET_OUTPUT ioctl. Change the output...
View ArticleForum Post: Dark frame subtraction
hi,we are working on IPNC3.5 now. Data flow path is memory-to-memory mode,that means data flow like blow: raw -> ipipeif -> isif -> ddr, ddr -> ipipeif -> ipipe -> rsz...
View ArticleForum Post: Wheher I can call HWI_enter in SWE handler?
Hi experts:When I reading the document spru403n.pdf<<TMS320C6000 DSP/BIOS 5.31 Application Programming Interface (API) Reference Guide>>I got following pieces of information. but not clean...
View ArticleForum Post: audio AIC3X cap
hi all ,now my own board don't use the TVP5158,because i use the commandarecord -l:card 0: SOUND0 [TI81XX SOUND0], device 0: AIC3X tlv320aic3x-hifi-0 [] Subdevices: 1/1 Subdevice #0: subdevice #0so how...
View ArticleForum Post: RE: Does BIOS MCSDK C66x v2.1.2 support CCS v6.0.0
Hi Iain,In Practical, It should be compatible. Please let me know if you have any issues in using it. We can help you to resolve it.Thanks.
View ArticleForum Post: RE: SPI Example
Hi Rajasekaran K ,Thanks for your reply.So I Can't use the SPI for communication with an external device, Can I ?I used the functions which is defined here C:\Program Files (x86)\Texas...
View ArticleForum Post: Two IP address for One 6455
we knew the 6455 has a IP address,But now, we want to give two IP address to one 6455 with the help of NDK. How?
View ArticleForum Post: DM8127 can‘t enter the MSP_ISS_DRV_ISIF_VD_ISR
GV7601's output connected to DM8127’s VIN0 port，and D15-D0,HSYNC,VSYNC,PCK are all right .The format of GV7601's video out put is 16bit,YUV422.But now I can't get the MSP_ISS_DRV_ISIF_VD_ISR in file...
View ArticleForum Post: tcp socket program on EVM6678
Hello,I want to develop a tcp socket client program on EVM6678, I defined the SOCKET for tcp as global variable so that I can use it in two tasks,the task described bellow:one task for connectting the...
View ArticleForum Post: RE: about dm8168 hdvpss, Why not sync？
Try using an external 1:N splitter and feed the same camera source to both channels .This will confirm timing difference is from the camera
View ArticleForum Post: RE: pLIstElem为什么一直是NULL
It indicates IpcBitsOutLink is not sending any data.If this is bitsOutLink connected to encLink this means encoder is not outputing any data
View ArticleForum Post: RE: [DM8168] A8 can't get correct data of dsp alg's output
You should do Cache_wbInv before putting the buffer in fullQue to ensure contents are written to ddr from c674 cache.Refer this...
View ArticleForum Post: RE: Global variable for multicores
I have found already answer on my question and the nice example in this post:http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/170760.aspx(Order of core execution on 6678)Thanks for all,Best...
View ArticleForum Post: Multicore shared memory access time
I'm using SRIO to transmit data between 2 DSP and a FPGA.I need to transmit abount 1MB of data in each transaction so the L2 of the Core dedicated to SRIo communication is not enough, so i need to use...
View ArticleForum Post: RE: AIF2 antenna carrier shift problem
Arda,For PE, OBSAI and CPRI use the same timing mechanism, so the PE AxC offset should be 310 (ignore the document)your code should look like below.for (i = 0; i < 128; i++){...
View ArticleForum Post: RE: C6472 - clarification on EDMA maxwait and SRIO DMA maxwait
Hi Eddie,The MAXWAIT value applies to all SDMA transactions i.e. you cannot further program it granularly for EDMA v/s SRIO v/s some other master. QUEPRI is the only place you can really affect the...
View ArticleForum Post: RE: Not used clock inputs for C6678
Hi Torben,The statement above is valid for both IO before core and core before IO. The LJCB clock input buffers are powered by the CVDD rail. Pulling the unused clock input to CVDD will not violate the...
View ArticleForum Post: RE: Activating color bars on DM355 TVOUT from reset state
Here is another post that could help: http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/155133.aspx It is a different platform, but should help you get a better idea of how this is...
View ArticleForum Post: RE: Max Frequency of 64-Bit Timer Plus (tms320c6748)
If I'm using general purpose timers in 32-bit unchained mode:I cannot use an external timer for timer3:4 no matter what1?If I enter event capture, I can only use internal sources for the timers2?1.TRM...
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