Forum Post: RE: C6748's USB 2.0 Port : Very low data transfer rate
Hi,Please refer the TI wiki to know the USB performance,http://processors.wiki.ti.com/index.php/StarterWare_USB#Performancehttp://processors.wiki.ti.com/index.php/StarterWare_01.10.01.01_User_Guide
View ArticleForum Post: RE: OMAP-L138 LCDK VPIF raw data capture mode problem
Hi Bill,Thanks for your post.Actually LCDK board has HW support for RAW capture device, because it has connector for LeopardImaging camera boards. VPIF configuration is based on vpifloopback demo and...
View ArticleForum Post: RE: Turn off M3(HDVPSS/HDVICP) in Low Power Mode
Hello TI,Any ideas on the above queries?Thanks,Krunal
View ArticleForum Post: RE: DM8148 failed to suspend
Hello TI,Any suggestions for the query?Thanks,Krunal
View ArticleForum Post: C6746 EMIFA access effects SPI with DMA
Dear experts,I am using C6476.I access FRAM with EMIFA,and EDMA is used to read 16bits ADC sampling data by SPI interface.When I access FRAM,I miss one sampling data.But without FRAM access, everything...
View ArticleForum Post: RE: http://learningmedia.ti.com/ not working
Hello Mr. R.Hillard,Thank you. The three Keystone2 videos are available but it seems a large portion of the TI training (video/audio) remains in an inaccessible state. FYI.Best,J.
View ArticleForum Post: RE: Will a Yocto image for a DM3730 Gumstix Overo work on a...
Checkout my github repository for the meta layer for logicpd https://github.com/dtran11/meta-logicpd
View ArticleForum Post: RE: PCIe example - CSL_BootCfgGetPCIEPLLLock does not lock
Gregor,0x840D vs 0x40D, the extra setting bit means PCIESSMODE as PCIE RC, this is latched to SW5 PIN 7 AND 8 of 6657 EVM, I don't know how they are set. I assume you have the code flashed to SPI NOR...
View ArticleForum Post: RE: GPIO Functions
Hi,What device are you using? I suppose it's one of the C66x.I think that there's not examples, but if you look at:PDK_C66xxxx_DIR/packages/ti/platform/evmc66xxl/platform_lib/srcYou will find a file...
View ArticleForum Post: RE: about TSU question C6678
Hi Paula！ first，thank you for your answer，because I wait for this answer too long time,I think nobody can answer it,so recentlyI have not seen your answer,sorry. C66x_h264hpvenc_01_00_01_04_ELF can...
View ArticleForum Post: Global variable for multicores
(Please visit the site to view this file)(Please visit the site to view this file)Hello,I try to create global variable that must be visible from 4 cores on C6678, but program do not changes the...
View ArticleForum Post: questions about h264hpvenc runs on a single core except core 0 in...
Hi,everyone C66x_h264hpvenc_01_00_01_04_ELF can run on a single core core0 successfully; C66x_h264hpvenc_01_00_01_04_ELF can run on multicore successfully,core0 as IVIDMC_TASK_MASTER ; Now I have a...
View ArticleForum Post: RE: PCIE_K2HC66BiosExampleProject - PCIe PHY Loopback in K2HEVM
Rams,For Q1 and Q2, I will check with our HW engeineers. Can you clarify in your customized board, how K2H SOC is connected to another PCIE EP?For Q3, the latest SERDES is...
View ArticleForum Post: RE: dm3730, linux 3.13.2, SGX SDK 5.1.1.1
Back on Linux 3.13.2, glibc 2.18 (for the missing ld-linux-armhf.so.3) and SDK 5.1.1.1, with a bit of progress (show below), a different set of errors, but as predicted, the original problem (failure...
View ArticleForum Post: RE: 10Mbit/sec transfer limit for DaVinci DA850/OMAP-L138/AM18x EVM
It seems that the discrepancy was in my having the processor saving the file after it was received. I didn't realize that saving the file was making such a difference, but by changing the netcat to...
View ArticleForum Post: RE: PCIE_K2HC66BiosExampleProject - PCIe PHY Loopback in K2HEVM
Eric,I also want to add a point that the PLX switch is held in reset while I performed the PHY loopback on custome board. Hope PHY loopback should be independent of the state of other PCIe devices in...
View ArticleForum Post: RE: Issue about decoding interlaced video
Yes you should set displayDelay correctly .For sequence above it should be atleast 4 .You should also increase numBufPerCh to say 10. Disable avsync if you are not setting correct...
View ArticleForum Post: RE: GPIO Functions
Dear Johannes ,Yes you are right I'm using C6670Actually I used the functions defined in the csl_gpioAux.h based on the examples in the doxygen comments of the functions.So I want to make sure that...
View ArticleForum Post: RE: C6748's USB 2.0 Port : Very low data transfer rate
Dear Norman,Thanks to your advice, I've found those files including DMA_MODE in Starterware's USB library. And, unfortunately, decreasing the interval from 10 to 1 doesn't improve performance. So,...
View ArticleForum Post: Does BIOS MCSDK C66x v2.1.2 support CCS v6.0.0
Does the combination of BIOS MCSDK C66x v2.1.2 and CCS v6.0.0 work or should I stick with CCS v5.5.0?
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