Forum Post: RE: DM8168 DVRRDK standalone decoder using LinkAPI
The problem with your implementation are:NUM_BUF_PER_CH 1 will not work.It should be 6 atleast.You are only copying the bitstream but are not populating any info in the bitstream buffer.You should...
View ArticleForum Post: RE: SOS! where is the mergebtbl,c and myparse.c?
try and have a look at "bfmerge.c" in mcsdk\tools\boot_loader\ibl\src\util\btoccs.
View ArticleForum Post: RE: Where can I find the "mergebtbl" utility?
you can try and find a compiled mergebtbl.exe http://processors.wiki.ti.com/images/d/d8/Boot_test_package.ziphave a look at this...
View ArticleForum Post: PAGESIZE field definition of SDRAM Configuration Register
Can anyone from TI confirm that there is error in SPRUGV8C document (KeyStone Architecture DDR Memory Controller User Guide) on page 4-6.At the bottom in the end of Table 4-5, Field PAGESIZE, written:0...
View ArticleForum Post: AER : on DM3730's DSP
hi,we r using DM3730,with linux/wince running on it....we have downloaded AER package from www.ti.com/toll/tecomlib, and have installed them on host pc....i hav no idea to how to use those libraries...
View ArticleForum Post: RE: RE: AISgen fails to configure DDR2
About a UBL. I'm not using any OS. Only my code and a bare metal. Intersting thing. I'd checked a command sequence into generated .bin file and notice that command for DDR controller configuring is...
View ArticleForum Post: DCC File loading and usage
I am using DM385 IPNC RDK 3.5 and integrating a custom sensor onto it.I'm trying to figure out how to use the DCC tool and apply the settings to the IPNC, however the documentation for it isn't very...
View ArticleForum Post: RE: Assembly works on simulator, not hardware. Pipelined Assembly...
Hi,Chris may feel my precious question is appropriate to answer. Sorry about that. I want to know the hand code ability in C64 fixed point. I cannot find it for a long time. Can I ask how many trellis...
View ArticleForum Post: RE: Multi McASP I/O pins
Constantine,This pin multiplexing and selection can be difficult to explain in the general sense, but they did do an accurate job of that description in the datasheet. Unfortunately, being accurate is...
View ArticleForum Post: DSP max/min voltage input
Hi !I have this DSP TMS 3220 C6713 DSK. I am making a wireless connection. I want to know what is the min and max voltage level that this DSP can handle.It has got THE AIC23 CODEC...
View ArticleForum Post: RE: Highly optimezed assembler routine calculating 8x8...
Mathias,May I assume you have already searched TI.com, the TI Wiki Pages, and the E2E forum for prior discussions on calculating a determinant? If not, that will be a good start.Write your determinate...
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Forum Post: RE: C6678 cache problem
Si Cheng,The C66x DSP CorePac User Guide explains the cache operation and the answers to your questions, if I understand your questions correctly. Please refer especially to sprugw0 sections 3.3.5 (L1D...
View ArticleForum Post: RE: Availability of TMDXEVM6614LXE ?
Dieter,The TCI6xxx products are not publicly available products. These are designed for and sold to a select market with all support delivered through Field Application Engineers and direct factory...
View ArticleForum Post: RE: 6472 HPI can not been write good
Yufu Zhang,The basics that you are showing look valid. Some details to clarify, please:1. The value written to HPIC is 0x0001 but the read shows 0x0101. Please try other values written to HPIC to...
View ArticleForum Post: RE: C6678 DDR3 initialization
Hi,DDR_SDRFC = 0x00005162; --> this is where the 500us refresh interval is programmed. Initialization is triggered by writing to the SDCFG register.The step before that is just making sure the...
View ArticleForum Post: LTE PHY layer
I need to implement LTE PHY layer in my application, actually I get lost between different versions of TI processors in this field, so I need help on how to select the best chip processor (or DSP) for...
View ArticleForum Post: RE: OMAP-L137 (TMDSOSKL137) Uart 115200 doesn't work due to L137...
Ping Tai,The UART transceiver on board (TMDSOSKL137) support 250 Kbps under typical condition. In your case it doesn’t work if the baud rate is programmed to 115200 bps that means 115.2 Kbps. So that...
View ArticleForum Post: RE: DM8148 DDR3 533 MHz and OPP
We simply enabled CONFIG_I2C in the first stage u-boot, and then used i2c_write() to set PMIC regs ...
View ArticleForum Post: RE: MMCSD/SPI clocking signals on J15 expansion connector
Hi Pert Duga,From your post I understand you need two clock source one is for SPI 40 MHz and other one is for AD5932 50 MHzAnswers to you questions1. The Value of the function clock frequency =...
View ArticleForum Post: RE: About power-down sequence of C667x
Yi,Ideally, the power down sequence is the reverse of the power up sequence with the same maximum durations. This eliminates excess electrical stress. Some system designs such as those supporting...
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