Hi Kevin, Thanks for the reply. I'm able to generate the values for TDA2x for cpu board DRA752-GP ES2.0. So as mentioned in the "Software Guidelines to EMIF/DDR3 Configuration on DRA7xx Devices pdf" present in the following link. http://www.ti.com/lit/an/spraca1/spraca1.pdf I generated the values for DDR3 and I compared with the values present in the PDF under section 3.1 what I mentioned in the above link.Those values are matching correctly.(I generated values for chip MT41K512M16) 1. But I observed some generated values from EMIF tool are differed while filling the structures at u-boot covered at section 3.2.1Updatethe EMIF1/2DDR3TimingParameters. The parameters which are differed from generated values are listed below. const struct emif_regs emif1_ddr3_532_mhz_1cs_2G{ .sdram_config2= 0x08000000 ///////////////////////////////These are the values differing in EMIF1 structure/////////////////////////////// .sdram_tim2= 0x30BF7FDA .sdram_tim3= 0x427F8BA8 .zq_config= 0x0007190B } const struct dmm_lisa_map_regsDRA75x_DDR3L_532MHz_TI_EVM_revG3_dmm_regs= { .dmm_lisa_map_2= 0x80640300 } const struct ctrl_ioregs ioregs_dra7xx_es1= { .ctrl_lpddr2ch= 0x40404040, .ctrl_ddrio_2= 0x84210000, ///////////////////////////////////In this structure these values are not generated in the EMIF tool//////////////////////// .ctrl_emif_sdram_config_ext= 0x0001C1A7, .ctrl_emif_sdram_config_ext_final= 0x0001C1A7 ,.ctrl_ddr_ctrl_ext_0= 0xA2000000, } In Software Guidelines to EMIF/DDR3 Configuration on DRA7xx Devices pdf & what ever the reference doc for EMIF tool saying to generate the tuning parameters, but the tool is generating only one structure, with that one structure how you are filling this " const struct emif_regs emif2_ddr3_532_mhz_1cs_2G{ }" structure.Those generated values are matching to emif1 structure Why these values are differing?What exactly the differed values going to change in the aspect of configuring the DDR3. These values are differed in PDF also. 2. As per my understanding emif1 is configuring to 2GB for two chips of "MT41K512M16" and emif2 is configuring to 2GB for four chips of "MT41K512M8".Is it right? if it is right means we need to generate the tuning parameters independently for those two chips correct? Please help me to understand the DDR3 parameters tuning. Thanks & Regards, A.Kavya Harini.
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Forum Post: RE: Linux/TDA2SX: Regarding the DDR3 tool(EMIF tools) which is used to get the initialization values of DDR3
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Forum Post: RE: PROCESSOR-SDK-AM335X: SPI and I2C
[quote user="Gaurav Aggarwal1"]I am using I2C_skAM335x example project but in debugging mode nothing is coming to terminal. I am not getting whether i2c is working or not.[/quote] I2C example does not provide console output on CCS console, but on terminal console. On my Ubuntu I start terminal session with below command and have the below result in this console. pbotev@lin-0306:~$ picocom -b 115200 /dev/ttyUSB1 picocom v1.7 port is : /dev/ttyUSB1 flowcontrol : none baudrate is : 115200 parity is : none databits are : 8 escape is : C-a local echo is : no noinit is : no noreset is : no nolock is : no send_cmd is : sz -vv receive_cmd is : rz -vv imap is : omap is : emap is : crcrlf,delbs, Terminal ready EEPROM data matched All tests have passed.
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Forum Post: RE: Linux/TDA2SX: Failed to debug spl/u-boot-spl, it stoped in cpu_init_cp15
Hi, Yordan I modified the makefiles following the guide. But it seems useless. The code stopped at the same position as described in the original post. Regards, Liu Gan
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Forum Post: RE: CCS/AM5749: Diagnostics build issue
Hi, From your log, there is no source code compilation, it just went directly to linking linking C:ti/pdk_am57xx_1_0_14/packages/ti/board/obj/idkAM574x/armv7/dcan_loopback_app_main.o C:ti/pdk_am57xx_1_0_14/packages/ti/board/obj/idkAM574x/armv7/diag_entry.ao into C:ti/pdk_am57xx_1_0_14/packages/ti/board/bin/idkAM574x/armv7/dcan_diagExample_idkAM574x_armv7.out ... C:ti/gcc-arm-none-eabi-7-2018-q2-update/bin/arm-none-eabi-gcc: not found That means you must compiled the code before? How do you compile it without issue finding the same GCC compiler? What is your host PC? Why there is no slash ("/") in "C: / ti/..."? Regards, Eric
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Forum Post: RE: TINA/Spice/TDA2PXEVM: TDA2PXEVM: Move MCAN to A15 on VSDK
Hi Rishabh, With the changes that Lucas has suggested, I can see Harman_man and can_client getting compile for A15 and app_alg_plugins. But I am still facing issues with linking use cases with app_alg_plugins. Regrads, Bikash
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Forum Post: RE: Linux/AM4379: U-boot doesn't start
Thank you Krunal, I'm waiting for your answer. Regards, Mehmet
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Forum Post: RE: Linux/AM3352: SDK Linux Image
sorry this was because of I installed SDK as a root. now works
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Forum Post: RE: TDA2PSX-ACD: Functional Safety FMEDA
Hi Viktor, You would need to get in touch with your TI representative to understand the Failure Calculation using the FMEDA sheet. - When switching to the device TDA2PHG-ACD is there anything we have to take into account from functional safety point of view? This is little vague, do you have some specific device feature you have used in the past and curious if TDA2px supports this or not. Thanks and Regards, Piyali
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Forum Post: RE: Linux/AM3352: SDK Linux Image
Okay. Does your board boot with the new MLO and u-boot.img images now?
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Forum Post: RE: RTOS/AM4376: Diagnostic examples on custom board
Hello, I tried to do that. But the run never goes through the sbl (which I loaded at 0x402f4000) and therefore, it never reaches the breakpoint. At some point, the run gets stuck in the public ROM (at the address 0x30088). Is that a normal behaviour ? regards, Gilles
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Forum Post: RTOS/TDA3XEVM: Why some algorithms required for building the sdk, even the algorithm is not used in the usescases?
Part Number: TDA3XEVM Tool/software: TI-RTOS Hi, We are in the process of removing the unwanted usecases and alogorithms in the apps project of vision sdk, below we have some questions regarding build system. 1) Is this the right way to remove the unwanted usecases and algorithms from apps folder? 2) We removed some of the algorithms in alg_plugins, but we hope these mentioned alogorithms are required for building the sdk E.g(edgedetection,streo_app,denseopticalflow,surrondview..etc). We looked into the MAKEFILE.MK and the below libraries are included by default in sdk, eventhough ALG_var_name is not set in the usescases. Could we know what is the reason? DSP_ALG_LIBS += $($(MAKEAPPNAME)_PATH)/src/rtos/alg_plugins/commonutils/lib/commonutils_c66xdsp_$(PROFILE_c66xdsp_1).ae66 DSP_ALG_LIBS += $($(MAKEAPPNAME)_PATH)/src/rtos/alg_plugins/structurefrommotion/lib/structurefrommotion_c66xdsp_$(PROFILE_c66xdsp_1).ae66 DSP_ALG_LIBS += $($(MAKEAPPNAME)_PATH)/src/rtos/alg_plugins/surroundview/lib/surroundview_c66xdsp_$(PROFILE_c66xdsp_1).ae66 DSP_ALG_LIBS += $($(MAKEAPPNAME)_PATH)/src/rtos/alg_plugins/autocalibration/lib/autocalibration_c66xdsp_$(PROFILE_c66xdsp_1).ae66 DSP_ALG_LIBS += $($(MAKEAPPNAME)_PATH)/src/rtos/alg_plugins/autoremap/lib/autoremap_c66xdsp_$(PROFILE_c66xdsp_1).ae66 APP_LIBS_c66xdsp_1 +=$($(MAKEAPPNAME)_PATH)/src/rtos/alg_plugins/rear_view_panorama/lib/rear_view_panorama_c66xdsp_$(PROFILE_c66xdsp_1).ae66 APP_LIBS_c66xdsp_2 +=$($(MAKEAPPNAME)_PATH)/src/rtos/alg_plugins/rear_view_panorama/lib/rear_view_panorama_c66xdsp_$(PROFILE_c66xdsp_2).ae66 APP_LIBS_c66xdsp_1 +=$($(MAKEAPPNAME)_PATH)/src/rtos/alg_plugins/stereo_app/lib/stereo_app_c66xdsp_$(PROFILE_c66xdsp_1).ae66 APP_LIBS_c66xdsp_2 +=$($(MAKEAPPNAME)_PATH)/src/rtos/alg_plugins/stereo_app/lib/stereo_app_c66xdsp_$(PROFILE_c66xdsp_2).ae66 Best Regards Prakash
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Forum Post: Linux/AM5728: The ethernet phy is not detected in Linux during startup
Part Number: AM5728 Tool/software: Linux This is a custom board with the AM5728 and two ethernet phys, DP83867 and MAX24287. The phy DP83867 is working although only at 100Mbps. The MAX24287 is not working at all probably due to a clocking issue. In u-boot I can use the ethernet on the DP83867 phy and I can download the Linux kernel using tftfboot from a Linux server. But in Linux I can't get the configuration correct to use a single phy, so not using the dual-emac functionality. During startup I get: [ 2.797376] libphy: Fixed MDIO Bus: probed [ 2.860794] davinci_mdio 48485000.mdio: davinci mdio revision 1.6, bus freq 1000000 [ 2.868490] libphy: 48485000.mdio: probed [ 2.874962] davinci_mdio 48485000.mdio: phy[5]: device 48485000.mdio:05, driver TI DP83867 [ 2.897240] cpsw 48484000.ethernet: No slave[1] phy_id, phy-handle, or fixed-link property [ 2.905603] cpsw 48484000.ethernet: Detected MACID = fc:69:47:f3:49:66 [ 2.912244] cpsw 48484000.ethernet: initialized cpsw ale version 1.4 [ 2.918628] cpsw 48484000.ethernet: ALE Table size 1024 | | [ 8.351660] net eth0: initializing cpsw version 1.15 (0) [ 8.411220] net eth0: phy "/ocp/ethernet@48484000/mdio@48485000/ethernet-phy@5" not found on slave 0 [ 8.475266] libphy: PHY not found [ 8.478690] net eth0: phy "" not found on slave 1, err -19 [ 8.578253] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready To me it looks like the binding between ethernet mac and phy is not done. Looking in sysfs I can't find anything relationship between the mac and the phy. Also ethtool is not showing any phy information. Currently my devicetree is: &davinci_mdio { /* reset-gpios = ; reset-delay-us = ; */ phy0: ethernet-phy@5 { reg = ; max-speed = ; }; }; &mac { status = "okay"; active_slave = ; /*dual_emac;*/ }; &cpsw_emac0 { phy-handle = ; phy-mode = "rgmii"; /* dual_emac_res_vlan = ; */ }; How should the devicetree look like for a single phy? Is the above correct? During startup the phy is detected, but in a later stage there is an issue. Is this because of the non-existance of second phy?
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Forum Post: RTOS/66AK2H12: Moving from the GEL file on the EVM, to SoC initialization on production chip
Part Number: 66AK2H12 Tool/software: TI-RTOS Hi there, We are working on transitioning from demo software on the EVMK2H evaluation module to a production 66AK2H12 chip. So far we have been putting software on our DSP chips on the EVMK2H by first loading the correct GEL file onto the selected DSP core via Code Composer Studio, and then loading a .out file onto that DSP core. We are running SYS/BIOS on all DSP cores. We need to transition away from Code Composer Studio so that when we finally manufacture a prototype board with the 66AK2H12 chip we are ready to go. Currently, we want to start by switching to having the system pull the .out image for each DSP core from an SD card and then loading it onto each DSP core. This leads to some questions: How do pull the .out image from an SD card properly, and load it onto a DSP core? Do we use the secondary bootloader? If so, how do we do this and how do we prepare the SD card. How do we initialize the DSP core (PLL, clocks, DDR3, etc) without a GEL file? I see that the GEL file is written in syntax that looks like C, is there a place that we can find "initialization" code that we can run on startup that mimics the functionality of the GEL files? How can we see what hardware changes to expect when we transition from the EVMK2H to the 66AK2H12 chip? Obviously our memory regions will change, is there a document that details any other changes and what the transition process looks like? Thanks! Andre
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Forum Post: RE: Linux/TMDX654GPEVM: Application build issue
Any pointers to resolve this would be greatly appreciated :(
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Forum Post: RE: AM4379: EMAC boot issue
Hello Rob, Could you please share the pcap file of your packet transactions? I am not able to understand packet number 5 because the source name should be "TexasIns_xx" but I do not know who is "PcsCompu_xx". On a test setup, the packet looks like the following: "3 0.039959848 TexasIns_xx:yy:zz Broadcast ARP 64 Who has " Regards, Krunal
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Forum Post: RE: TMS320C6746: mcasp StaterWare problem - undefined symbol
I forgot the JTAG emulator and was just connected to the UART. What emulator would you recommend for the C67x development kit and CCS 9.0.1.00004?
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Forum Post: RE: CCS/AM5749: Diagnostics build issue
Hi Eric, I have no idea why there is no slash in C:ti... I also noticed but I cant explain. I checked the makefiles but i didn't find anything. I just followed the instructions of the starter guide by installing the pdk first. the "gmake" procedure worked well for this purpose. I'm just surprised that "gmake" fails for the diag... Regards, Sylvain.
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Forum Post: RE: Linux/PROCESSOR-SDK-AM335X: Illegal instruction
https://stackoverflow.com/questions/49051641/how-read-coprocessor-registers-in-arm-architecture Do not ask questions you can google in 1 minute.
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Forum Post: RE: RTOS/OMAP-L138: Problem with writing data to the SD card (EDMA cause the problem)
Thanks Sahin for your response, but I'm still waiting for update.
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Forum Post: RE: PROCESSOR-SDK-OMAPL138: CSL update breaks project
Details regarding CSL documentation are provided in the SOftware developers guide here: http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_device_drv.html#am57x-k2x-c66x-c674x Users are required to include top level CSL header for the module for example for GPIO include cslr_gpio.h and csl_gpio.h and then add a compiler define for the SOC being used -D SOC_OMAPL138. the macro definition defines the version of the IP included and pulls in the required APIs. We also provide GPIO driver for the processors supported in the Processor SDK RTOS which abstracts the underlying IP implementation details and provides common API interface. GPIO driver source that uses CSL is provided here: You can look at the GPIO driver example as a starting point. http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_device_drv.html#building-gpio-examples If you still prefer to use the CSL for programming the GPIO interface then here are are the key things from an SOC perspective that are required. 1. Setup the PINMUX for the SOC to configure the GPIO pin as input or output and configure the mux mode. 2. Enable the power to module using PSC 3. Use CSL API to indicate pin and port number of the GPIO 4. Setup the GPIO output using GPIOPinWrite_vX or GPIOPinRead_vX. where X is the version number of the IP on the SOC. OMAPL138/C6748 uses version v0. Your understanding of banck number and pin number is correct. The base address that you pass will provide the port number. Regards, Rahul
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