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Forum Post: RE: Ti8167 memory map adjust issue

Hi,  Badri ,          Thanks for your replay.   I changed the config file based on you suggestion. Now it worked.          I'll do some test.  Thanks very much!(Please visit the site to view this file)   

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Forum Post: RE: Suggested DDR2 chip for C6748LCDK derived board

Hi!I use MT47H64M16 which has the same timing as K4T1G164QFBest regards

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Forum Post: RE: DSPF_sp_fir_gen() problem

Ayman,Why do you state the numbers in pairs? Are you considering this data as complex data pairs?Where do you observe a number is 1.2 e-43? Where do you see 9.2 e-41?Why do you think 1.2 e-312 is...

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Forum Post: RE: system analyzer c66

This is a very good question. It seems to add some overhead.Can someone from TI help with this. I read all manuals by could not find the answer.ThanksNaim

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Forum Post: No data from UART for C5515

Hello all,We have a custom board using the TMS320C5515 and ADS1298 based on TI's MDK reference design and software. We are trying to view data remotely on a PC from the board however no data is coming...

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Forum Post: RE: Some problems with SD card on OMAP-L137

HI,Thanks for your update.

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Forum Post: RE: How to reduce the sampling of the tms320C6711 DSK kit from...

i am using tms320c6711 dsk kit

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Forum Post: RE: DVO2 color bar on DM385

Good to hear that color bar test is working fine. Now it is just displaylink that we should make it working. Did you check that when set_fmt ioclt is called, the frame size that is used is 720x576 and...

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Forum Post: RE: Preformance of Dsp ( new to TI )

Hi,[quote]      Now we noticed that  TI have development kit  based on TMS320C5515 ; but since we are new to TI DSPs does this DSP enough for our Project?[/quote]This C5x (C5515) processors are very...

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Forum Post: RE: DM8168 Hybrid DVR

Hi Badri,Now I am using VSYS_USECASE_MULTICHN_PROGRESSIVE_VCAP_VDIS_VENC_VDEC usecase and mapped the channels as;vdMosaicParam->chnMap[0] = 16; vdMosaicParam->chnMap[1] = 0;I am waiting ch[0] of...

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Forum Post: RE: DM814x DDR3 SW Leveling - Byte Wise

Thank you!!!

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Forum Post: RE: About the priority of Cache_wb Cache_wbInvAll in C6657

CheneyLiu,Those are user coherence operations, and the Priority for those are set by the UCARBD and UCARBU registers (for L1D and L2 respectively.)  By default the UCARBx registers have the Priority...

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Forum Post: RE: Launching kernel error

Have you tried to check the CRC ?yes but  "Bad Header Checksum" appears When I put "setenv verify no", i have the same error"Bad Header ChecksumERROR: can't get kernel image!"

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Forum Post: CMOS to TMDXLCDK6748 using GPIOS

HelloI have a doubt about TMDXLCDK6748.I have read that this board has a camera connector, but it is only for leopard imaging cameras.I want to build a system to do some image processing. I want to...

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Forum Post: RE: C5505 allowable receive baud rate error

AndMan,A good error margin is +/-2%.  A good analysis is here:http://pdfserv.maximintegrated.com/en/an/AN2141.pdfBear in mind that both ends of your link may have error.Regards,Bill

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Forum Post: RE: C6472 SRIO Messaging

Thanks.Those docs are in reference to the c66xx class parts. Are they using the same SRIO IP?

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Forum Post: RE: Problems when joining L138_am_poll and gpio projects

How did you change the format of the libraries?

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Forum Post: RE: Dynamic DAC_ATTEN value change of audio codec

Hi,I don't understand what you are saying. I'm working with the TMS320C6748 and I don't get why I can't change the value of the array (input signal) and then send it to the output signal. There should...

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Forum Post: RE: EVM6678 XDS560v2 mezzanine card connection issue

Hi YC,Any update? Please help us to close this thread.Thanks.

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Forum Post: RE: C6678 TSIP interface loopback

Any update? Please help us to close this thread.Thanks

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