Forum Post: RE: about TSU question C6678
Hi Jingshuai,Are you currently using one core or multiple cores for decoding/encoding in H.264?if one core is enough, we think a good starting point for you could our CCS transcode example...
View ArticleForum Post: RE: dc input issue
Hi Shahzad,There is no possibility of connecting direct DC input to TLV320AIC23 audio codec; you can opt for an external ADC for this...
View ArticleForum Post: RE: Developing with CCS v5.5 for either C6713 or C6701
Hi Grueneberg,The CCSv5.5 training slides are common for all the parts, we don’t have one specific for C6713, but it won’t make much differences for migrating from CCS v 3.3 to CCS v 5.5You can...
View ArticleForum Post: Are high impedance clocks during powerup of TMS320C6678 really...
Hello,I had to change the clock buffers on my board design and just realized they don't have a high-z output mode, only a static differential "off" (P low, N high).The datasheet specifies that the...
View ArticleForum Post: Initializing DSP through ARM linux
What would be the correct method to load an executable binary program into the DSP core system from userspace on the ARM cores? I am using the Keystone II TCI6638K2K with SMP linux running on the ARM...
View ArticleForum Post: RE: FIR filter implementation in C55xx processor
Aravind,Well, using fir2() you could execute n_firs FIR operations per second:n_firs = cpu / (nx * (3 + nh/2) + 25)where:cpu = clock rate, Hznx = buffer sizenh = n coefficientsSo, for cpu=120e6,...
View ArticleForum Post: RE: bottom 4 lines missing
If "pass-through" mode is set to resizer, anything else is needed to set to let original size RAW data to be output?Any settings needed...
View ArticleForum Post: RE: Please help connect DM6437EVM to CMOS MT9V032
Hi Akchurin,I hope you’re using parallel way to interface image sensor module to DM6437,you need to use external crystal oscillator to generate 26.7MHz clock for SYSCLK input and connect the PIXCLK to...
View ArticleForum Post: RE: [McASP] to detect BCLK clock error at I2S interface
Hi Hayden,Thanks for your post.I don't think, there is a way to detect clock error at the i2S interface other than detecting CLKERR thru. XSTAT & RSTAT.One thing, you can do is to probe the CLK, FS...
View ArticleForum Post: RE: C6727 Mcasp && dMAX configuration
Hi Ming,Thanks for your post.Have you set the XDMAERR/RDMAERR flags in the XSTAT/RSTAT register? If not, please try setting to assert any transmit/receive DMA error if any? Please refer sections 3.3.2,...
View ArticleForum Post: RE: I cannot make timers work in 32-bit chainned mode in a...
Hi,Thanks for your post.Please validate your 32-bit timer chained mode configuration procedure thru. section 29.2.1.4.2.1.1 & to enable the 32-bit timer chained mode, kindly check section...
View ArticleForum Post: what is the max resolution supported by dm8168 vpss?
I want to have 800x2560 resolution output on dvo2 of dm8168evm. I have modified kernel image to support the customized resolution, and I do have the output timing(pixel clock, hsync, vsync..) as I set,...
View ArticleForum Post: C6670 AIF loopback on link 1 without link 0
HelloI'm trying to run AIF2 example Aif2_Cpri_Generic_Packet_Test from CSL (PDK C6670 1.1.1.6). This test is passed with AIF Link 0 in loopback mode. But then i try to use Link 1 instead of Link 0 test...
View ArticleForum Post: RE: Cache coherence operations taking a long time to complete
Sorry, I was thinking about another thread when I wrote that reply. It should be UCARB for the coherence operation, which you probably want to make sure is elevated to ensure the coherence operations...
View ArticleForum Post: RE: C6748 secure secondary bootloader
Hi Kevin,I have sent you the examples that youhad requested.Regards,Rahul
View ArticleForum Post: DM816x Input capture for custom High Res
Hi all,I plan to evaluate DM816x family soon. And I would like to know if it's possible to interface it to an High Res image sensor and feed the DM816x with a custom high resolution video stream.My...
View ArticleForum Post: RE: Timing within OpenMP on C6678
(Please visit the site to view this file)
View ArticleForum Post: RE: Cache enabled, DSP-RESET / L2-memory corrupt
Hi Vijay,Thanks for your post.First, you should meet the usage guidelines for L2 cache coherence operations and kindly refer to ensure the section 2.4.3 from the C674x DSP cache user guide as...
View ArticleForum Post: RE: Initializing DSP through ARM linux
I have been trying this but I keep getting "load failed (error: -104)". When I run$mpmcl load dsp0 DSP_test.outI have also added tried to wake up the DSP at uboot : $setenv debug_options 1Which works...
View ArticleForum Post: RE: How to generate c6657 nand boot boottable?
Hi Rolan,Sorry for the delayed response on this issue. I understand that you are trying to do a Native NAND boot on the C6657 custom board. We have created an example for this using production version...
View Article