Forum Post: RE: TI chip does support BT.1120 embedded TRS timing ?
Sorry brijesh,That last one is not true.davinci 8168 does support discrete sync capture at VIP1.We already have a card doint it.Regards
View ArticleForum Post: The question of DEI LINK
My env: dm8168 dvr rdk 4.0 I want to dynamically change the encode resolution, so I use DEI link before ENC LINK. However ,the quality of image so bad. for example , there are two chains : (1)...
View ArticleForum Post: RE: DDR3 problem with 6678 board
Hi Jeff,I don't suspect that the unpopulated ECC memory would cause this type of issue. Normally when we see this type of error we're dealing with a data length matching error. Are you seeing any...
View ArticleForum Post: RE: Difference between mezzanine xds560 and system trace emulators
The Blackhawk XDS560v2 and the mezzanine emulator card provide the same capabilities. The mezzanine card was designed specifically for use on TI EVM platforms and is based on the Blackhawk XDS560v2....
View ArticleForum Post: RE: Creat DSP/BIOS with C5515 ezdsp audio filter demo
The DSP/BIOS graphical configuration tool is used to set up the HWIs, no vectors.asm should be needed. You would find the HWI number associated with the DMA interrupt for the processor and modify that...
View ArticleForum Post: RE: What is the state of the C6713 GPIO pin between powerup and...
thank you!but Iwould like to confirm what state of the 6713 GPIO between powerup and negedge of reset,that is before POR. that is to say what are the pins before negedge of...
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Forum Post: RE: How To Config to use DM8168 HDCOMP(VGA)
thank you very much for your reply, frist.i'm using DVR-RDK 04.00.00.03 right now.i have alread find out how to display video from HDCOMP, I modified some registers ,such as 0x48140894 0x48140898 and...
View ArticleForum Post: RE: About 6678 EDMA PaRAM set
Hi Chan,I assume that you have all the parameters for the Param[A] to Param[B], if so than consider using chaining and not linking, you will use more EDMA channels but you will not need the trigger,Why...
View ArticleForum Post: RE: DM814x : termination resistors for DDR3
Thanks, I'll be waiting for the inputs from your DDR3 experts.As for the JEDEC I was referring to, it's attached here.(Please visit the site to view this file)The way the DDR3 is deployed on the DM8148...
View ArticleForum Post: RE: question about create DM8168 chains
Hi Badri, Thanks for your reply. I tried the DEI link in bypass mode, and I can not get the stream in A8, through call the interface...
View ArticleForum Post: Any hints on DM36x IPIPE Vertical Slicing Mode
I am using 5MP sensor with DM365. The bayer raw image size is 2592*1944. I need to convet the raw image to YUV prior to jpeg encoding. But the IPIPE supports only upto 2176 pixels width. In this case...
View ArticleForum Post: RE: [TMDSEVM3730] TVP5146 capture issue
Cvetolin,I checked android images of http://software-dl.ti.com/dsps/dsps_public_sw/sdo_tii/TI_Android_DevKit/TI_Android_GingerBread_2_3_4_DevKit_2_1/index_FDS.html at TMDSEVM3730. I could see the...
View ArticleForum Post: how to sync video/audiopackets received from rtsp stream？
Hello we use DM8168 with RDK 4.0 to develop a ipcamera with live555 。 However,we encountered a AVSync problem.We get video and audio stream from ipcamera and ,decode them and play, the vieo and audio...
View ArticleForum Post: read nandflash fail Iin AM1808_FlashAndBootUtils_2_40
hi! I use AM1808 and some problem with nandflash ，the source code is FlashAndBootUtils_2_40 1、when I erase a block(is a blank block) ，then read first page in the block ，return E_FAIL I DEBUG with ccs...
View ArticleForum Post: RE: Question about the scale mode of DEI link
thanks for your reply.I will have a try
View ArticleForum Post: Usb: over-current chabge on port1 Error
Hi all,Iam facing problem in detecting usb.We are using dm8168 processor, customer board. While booting it is continuously giving over current change on port1 error as...
View ArticleForum Post: In which status that DSP can receive SRIO packages?
HiI am facing a problem related to how to use RAPIDIO port on 6455 DSP. My question is: after I correctly config all the RapidIO register on DSP, how can I know there is a RapidIO package is received...
View ArticleForum Post: RE: 5535 dma i2s
The project now does ping-pong DMA with codec receive and transmit, in both DSP and I2S modes, both mono and stereo. However in both mono and stereo it is only transmits the left channel. As before...
View ArticleForum Post: RE: AIF2 antenna carrier shift problem
Albert,I want to learn whether the below situation is normal:pd_cpri_id_lut[0][0-127] register, which I used pd_cpri_id_lut[3][0-1] (there are two channel) is pd_cpri_id_lut[3][0] = 0x00000080 and...
View ArticleForum Post: RE: AIF2: antenna carrier offset
Hi,The AxC offset per channel is only set in initialise state? Can we change the offset value, while the system is running?Regards,Arda
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