Hello,
We have enabled the watchdog timer on the AM3874 for our board. Upon testing it where the watchdog reset occurs, we encountered an issue where the AM3874’s HDPVSS module is unable to properly load the firmware. It will get stuck and then another watchdog reset will happen. Thus, it gets into this loop forever. It requires a power cycle or a push-button reset (PORn) to be able to boot linux successfully again. Here’s the linux boot-up message when it fails to initialize the HDVPSS module.
++++++++++++++++++++++++++++++++++++++
------ boot-up after first watchdog reset -------
Loading HDVPSS Firmware
FIRMWARE: I2cInit will be done by M3
FIRMWARE: Memory map bin file not passed
Usage : firmware_loader <Processor Id> <Location of Firmware> <start|stop> [-mmap <memory_map_file>] [-i2c <0|1>]
===Mandatory arguments===
<Processor Id> 0: DSP, 1: Video-M3, 2: Vpss-M3
<Location of Firmware> firmware binary file
<start|stop> to start/stop the firmware
===Optional arguments===
-mmap input memory map bin file name
-i2c 0: i2c init not done by M3, 1(default): i2c init done by M3
FIRMWARE: isI2cInitRequiredOnM3: 1
FIRMWARE: Default memory configuration is used
Firmware Loader debugging not configured
Default FL_DEBUG: warning
Allowed FL_DEBUG levels: error, warning, info, debug, log
MemCfg: DCMM (Dynamically Configurable Memory Map) Version : 2.1.2.1
FIRMWARE: Ipc_CONTROLCMD_STARTCALLBACK Error: ProcMgr status 0xffffffff
FIRMWARE: Could not start: -1
------ watchdog reset triggered again -------
U-Boot 2010.06-svn261809 (May 20 2013 - 12:15:24)
TI8148-GP rev 2.1
ARM clk: 600MHz
DDR clk: 400MHz
++++++++++++++++++++++++++++++++++++++
This also happens in the TI DM8148 EVM board.
It looks like the HDVPSS module must also be reset to work correctly after a watchdog reset occurrence. I read that the watchdog reset is only a warm reset and that the HDVPSS will not get reset on a warm reset.
There is a TI forum thread that has the same issue but it is on a DM8168 EVM board. For the DM8168 boards, the WD_OUT pin is gated to the PORn (power-on reset) pin of the DM8168 board. So, in this case, HDVPSS will probably get reset correctly and the problem will not happen. Here is the TI forum thread:
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/242515.aspx
For the DM8148 boards, RSTOUTn_WD_OUT is not gated to the PORn pin of the DM8148 board. We just followed this part of the circuitry in our AM3874 board.
Do we need to follow the DM8168 EVM board watchdog reset circuitry and connect it to the PORn pin to make this work properly? Or is there other solution to this issue?
Any help is appreciated.
Thanks,
Maynard