Emmanuel,
Please note several things In order to use GPIO[31-16] in C6654/5/7 devices.
1. GPIO[31-16] are pin muxed with other peripherals. You need to program PIN_CONTROL_0 register to enable GPIO functionality. And you need to program KICK registers to unlock boot configuration registers as well. You can add following code to your project for this:
#define KICK0 (*(unsigned int*)(0x02620038))
#define KICK1 (*(unsigned int*)(0x0262003C))
#define KICK0_KEYVAL 0x83e70b13
#define KICK1_KEYVAL 0x95a4f1e0
#define PIN_CONTROL_0 (*(unsigned int*)(0x02620580))
......
//unlock boot cfg registers and configure GPIO pin16-31 mux
KICK0 = KICK0_KEYVAL;
KICK1 = KICK1_KEYVAL;
//Configuring the chip_pin_control0 register
PIN_CONTROL_0 = 0xFFFF0000;
2. GPIO user guide needs to be updated for BINTEN register that bit 0 is for Bank 0 (GPIO pins 15:0) and bit 1 is for Bank 1 (GPIO pins 31-16).
So you need to set bit 1 to 1 in BINTEN to enable the interrupt of GPIO pins 31-16.
GPIO_BITEN = 0x2 ;
There are other things related to C665x EVM only. It seems like some GPIO pins are connected to other circuits which prevent the user changing the GPIO pin level to trigger the interrupt, such as pin 22 is connected to UART.
But with the above 2 updates, you should be able to trigger interrupt on pin 18. You can make the following changes to trigger GPIO 18 event and observe "flag=1":
CSL_CPINTC_clearSysInterrupt (hnd, CSL_INTC0_GPINT18);
CSL_CPINTC_enableSysInterrupt (hnd, CSL_INTC0_GPINT18);
CSL_CPINTC_mapSystemIntrToChannel (hnd, CSL_INTC0_GPINT18, 0);
and
GPIO_SET_DATA = 1 << 18;
Task_sleep(1);
GPIO_CLR_DATA = 1 << 18;
Task_sleep(1);
If you have customized board without limitation on GPIO pins, you should be able to trigger the event on any GPIO pins with the notes above.
Hope they could help.