Part Number: AM5718 Hi All, We are using AM5718 processor with PMICTPS6590379ZWSR (OTP: 0X97). We first observed the volatage rail VDDA_PCIE was a short. But since other voltages were proper the DSP was booting up. We continued the operation without rectifying the issue. After 2 days another rails(VDDA_USB, VDDASATA) started showing short. but the operation was continued as our application didnt require SATA and USB. But, now the 3.3 (VDDSHVx) volt is also showing a short. The short is on DSP side as we isolated the PMIC and DSP, Also, the powergood of PMIC is asserted. What is the reason of such erratic behaviour? Please give us a probable reason and solution if any. Thanks, Rajneesh
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Forum Post: AM5718: Voltage rail short on multiple rails
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Forum Post: Linux/AM5728: Linux/AM5728: Camera sensor issue
Part Number: AM5728 Tool/software: Linux Hi, I use ti-processor-sdk-linux-am57xx-evm-05.03.00.07 SDK,I can't detect /dev/video1. I understand that the device name of the camera is /dev/video1 and /dev/video0 ,and display device name is /dev/drm in example-applications/dual-camera-demo-1.0/loopback.c. As shown below: I want to know how video0 and video0 are defined in the driver file.Please tell me where they are defined.Then I can change the driver file. I am very grateful that you can help me. Best Regards, Yc
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Forum Post: Linux/TMDXEVM3358: How to change GPIO voltage from 3.3V to 1.8V?
Part Number: TMDXEVM3358 Tool/software: Linux Hello, I need to design a core module use AM3358 processor, I decided to revise and simplify it by referring to the schematic diagram of TMDXEVM3358 . But now, one problem I encountered was that my GPIO voltage should be 1.8V, but the reference design is 3.3V. After consulting the datasheet of TPS65910A31, I realized that the output voltage of a LDO can be controlled by modifying the value of the register. This could solve my problem, but then I encountered a new problem. According to the datasheet, I understand that I need to modify the value of registers through the I2C interface to control the output voltage. But when I can operate the I2C interface, the processor should have actually completed the power-on and initialization. 3.3V is the default output voltage of LDO used by VDDSHVx. This also means that the voltage of GPIO exceeds the allowable range of my design, which may damage peripheral devices. So I want to know when I should operate the registers of the PMIC to modify this parameter (I found the PMIC-related code in uboot, but I think it's too late to modify the voltage in uboot)? Can you tell me where to modify or insert codes? And do I need to change my hardware design? Thank you for your help!
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Forum Post: Linux/PHYTC-3P-PHYCORE-AM57X: Boot prints on the USB instead of UART
Part Number: PHYTC-3P-PHYCORE-AM57X Tool/software: Linux Hi, We are using AM57x SOC on our board and we are using UART as debug console (system console of the AM57X SOC). But now we want to see the debug prints on the USB instead of UART. Has anyone done this ? Is this is supported in AM57x ? Is it possible straight forward connecting a USB cable to PC and observe the same? So is there any document which can help in this process? Thanks & Regards, Nanjunda M
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Forum Post: Linux/TMDX654IDKEVM: PRU Firmware
Part Number: TMDX654IDKEVM Tool/software: Linux I'm trying to go through the RPMsg Quick Start Guide to practice communicating with the AM65x's PRUs and have been running into issues. I'm using the AM65x Linux SDK verison 05.03.00.07 and running the prebuilt Linux image on my EVM. According to the Quick Start Guide, the Linux SDK should have symbolic links to the RPMsg examples in /lib/firmware, but this isn't true using the AM65x prebuilt image. My firmware list looks like this: root@am65xx-evm:/sys/class/remoteproc# ls -la /lib/firmware total 32028 drwxr-xr-x 4 root root 4096 Apr 6 2019 . drwxr-xr-x 9 root root 4096 Apr 6 01:52 .. -rw-r--r-- 1 root root 2046 Apr 6 2019 LICENCE.iwlwifi_firmware -rw-r--r-- 1 root root 918268 Apr 6 2019 iwlwifi-3160-17.ucode -rw-r--r-- 1 root root 1745176 Apr 6 2019 iwlwifi-8000C-13.ucode -rw-r--r-- 1 root root 2351636 Apr 6 2019 iwlwifi-8000C-16.ucode -rw-r--r-- 1 root root 2394060 Apr 6 2019 iwlwifi-8000C-21.ucode -rw-r--r-- 1 root root 2120860 Apr 6 2019 iwlwifi-8000C-22.ucode -rw-r--r-- 1 root root 2227284 Apr 6 2019 iwlwifi-8000C-27.ucode -rw-r--r-- 1 root root 2310116 Apr 6 2019 iwlwifi-8000C-31.ucode -rw-r--r-- 1 root root 2448976 Apr 6 2019 iwlwifi-8000C-34.ucode -rw-r--r-- 1 root root 2486572 Apr 6 2019 iwlwifi-8000C-36.ucode -rw-r--r-- 1 root root 2389968 Apr 6 2019 iwlwifi-8265-21.ucode -rw-r--r-- 1 root root 1811984 Apr 6 2019 iwlwifi-8265-22.ucode -rw-r--r-- 1 root root 2234528 Apr 6 2019 iwlwifi-8265-27.ucode -rw-r--r-- 1 root root 2307104 Apr 6 2019 iwlwifi-8265-31.ucode -rw-r--r-- 1 root root 2440780 Apr 6 2019 iwlwifi-8265-34.ucode -rw-r--r-- 1 root root 2498044 Apr 6 2019 iwlwifi-8265-36.ucode drwxr-xr-x 2 root root 4096 Apr 6 2019 ti-connectivity drwxr-xr-x 2 root root 4096 Apr 6 02:15 ti-pruss How do I include the PRU examples?
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Forum Post: AM5728: USB 3.0 PHY Drive Setting
Part Number: AM5728 Customer wants to know if there a way to set USB PHY driver current/pre-emphasis through a register ? They want to adjust the setting if available during USB Signal Integrity testing.
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Forum Post: RTOS/TMS320C6748: Understanding SYSBIOS benchmarks
Part Number: TMS320C6748 Tool/software: TI-RTOS DSP: C6748 SYSBIOS : 6.75.00.12 Board: Custom hardware I don't understand how to read the SYSBIOS timing benchmarks for HWI's. What I'm trying to answer is: "What is the SYSBIOS overhead for processing a HWI"? To answer this question you have to consider three cases. In all three cases, assume the application is running at the TASK level prior to the HWI, and it isn't executing within a HWI_disable() block of code, nor is it executing within a SLOOP. 1. ISR doesn't post a semaphore to wake up a TASK, nor does it post a SWI. 2. ISR posts a semaphore to wake up a TASK. 3. ISR posts a SWI. In all cases, the HWI fires and the CPU is off to the HWI vector table. From there it goes to the HWI dispatcher, which eventually calls our ISR. Our ISR executes, and then returns to the HWI dispatcher. Dispatcher figures out where to go next. I can profile my ISR to figure out how long it takes to execute, but I can't figure out how to piece together the rest of the times from the SYSBIOS benchmarks provided. Interrupt Latency: The SYSBIOS users guide says this is the time maskable interrupts are disabled. Furthermore it says it is the time from the interrupt firing to the first instruction of the interrupt dispatcher. Those two statements seem to contradict each other. Not sure if I need this number or not. The C674x number is 205 cycles. HWI dispatcher prolog: Defined in the SYSBIOS users guide as the time from when the interrupt fires until the user's ISR is called. The C674x number is 127 cycles. But wait, this is 127 cycles but the Interrupt Latency is 205 cycles. I think this is the number I need to answer "Interrupt fires to execute first instruction in my ISR". HWI dispatcher epilog: Defined in the SYSBIOS users guide as the time from returning from my ISR to finishing up the HWI dispatcher work. The C674x number is 159 cycles. Seems like I'll need this number as well. HWI dispatcher: Not defined in the SYSBIOS users guide. The C674x number is 281 cycles. You would think this should be the prolog + the epilog, but it doesn't add up (close but not exact). HWI to blocked TASK: Defined in the SYSBIOS users guide to be time from the start of an ISR that posts a semaphore to the execution of the 1st instruction in the TASK. However the diagram below this description includes the time from when the HWI fires and the prolog, which contradicts the description. The C674x number is 445 cyles. HWI to SWI: Defined in the SYSBIOS users guide to the be time from the start of an ISR that posts a SWI, to the execution of the 1st instruction in that SWI. However the diagram below this description includes the time from when the HWI fires and the prolog, which contradicts the description. The C674x number is 271. Here is my best guess at answering the three cases. 1. prolog + epilog = 127 + 159 = 286 cycles. This ignores Interrupt latency, because I think that is trying to define the total time maskable HWI's are disabled. It also doesn't include the HWI dispatcher, because I think that is covered with the prolog + epilog. Problably need to include one or the other in this calculation, but not sure. Confused. 2. prolog + epilog + HWI to blocked TASK = 127 + 159 + 445 = 731 cycles. If the HWI to block task description is wrong and the diagram is right, then this should only be 445 cycles. Confused. 3. prolog + epilog + HWI to SWI = 127 + 159 + 271 = 557 cycles. If the HWI to SWI description is wrong and the diagram is right, then this should only be 227 cycles. But that can't be true, as 227 is less than the prolog + epilog. Confused. Thanks, Dean
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Forum Post: Linux/AM5728: Toggle between being a DHCP client and server
Part Number: AM5728 Tool/software: Linux Hi, OS is Arago. AM5728 is currently a dhcp client on eth0. I want it to also be able to be a dhcp server on eth0. I want to be able to toggle between being a client and server on a click of a button per say. Can you please tell me how i can go about doing that? Hermon
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Forum Post: Linux/PROCESSOR-SDK-AM335X: Loadable Module Address to Physical Address
Part Number: PROCESSOR-SDK-AM335X Tool/software: Linux I have a custom board with an am335x chip. We have written a LKM that performs certain tasks for us. I see that this is getting loaded into the module virtual address range at 0xbf26b000. What I would like to do is convert this virtual address range into the kmalloc range of 0xC0000000. Or at least to a physical address and then use the macros to convert that to the kalloc address. Any suggestions on the best way to do this?
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Forum Post: Linux/TMDX654GPEVM: Cross Compiling C Application with external Libraries
Part Number: TMDX654GPEVM Tool/software: Linux Hello, I am trying to cross compile a sample application for Paho-Mqtt found on the bottom of this page: https://www.eclipse.org/paho/clients/c/ 1. I have the paho-mqtt-c recipe built in my rootfs as it was part of the provided meta-oe layer and I had to simple add it to IMAGE_INSTALL_append. 2. I also have it installed on my host machine using apt-get and can compile using gcc test.c -l paho-mqtt3c 3. I even sourced the environment_setup script and tried compiling : [linux-devkit]:~/work/mqtt-code> aarch64-linux-gnu-gcc -l paho-mqtt3c mqtt-test.c mqtt-test.c:4:10: fatal error: MQTTClient.h: No such file or directory #include "MQTTClient.h" ^~~~~~~~~~~~~~ compilation terminated. 4. How do I make the cross compiler see the correct library? Thanks, Prateek
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Forum Post: RE: RTOS/AM5746: Data abort questions
Hi Rei-san, I’ve reviewed the mentioned files with a colleague, and we don’t see any additional useful information. The customer needs to collect information about the errors differently to have any chance of converging on a root cause. The device TRM gives a 'typical error analysis" flow chart in the Interconnect chapter which must be followed. There are several layers of information in this sequence, and each layer has some partial information. After processing all the layers, ‘sometimes’ it’s clear what the error was and sometimes not. With the error information, it is usually possible in the lab to use the JTAG tools find the error. Regards, Melissa
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Forum Post: RE: AM5708: TIDL .y file
Please check this e2e post
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Forum Post: RE: Bootloader code protection
Hi, If you really want to protect the bootloader then you can use the FMPREn and FMPPEn registers for write protection. Please refer to the datasheet for details. Below is the excerpt from the datasheet. You can use the API FlashProtectSet() and FlashProtectSave() to configure the protection.
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Forum Post: RE: Linux/AM4372: Fbdev driver support in SDK 5.03
Hi Tony, As clarified offline, fbdev emulation with basic ioctl is supported by omapdrm driver. Processor SDK Linux supports out of box fbtest application. To run the fbdev output, you need to exit the Weston first. You can do so by running below command on target board #/etc/init.d/weston stop After that, - check that /dev/fb0 exists Then display random noise on fb device # cat /dev/urandom > /dev/fb0 Following that run a trivial fbtest application #fbtest Source code for fbtest can be found here kmsxx - https://github.com/tomba/kmsxx/blob/master/utils/fbtest.cpp Regards, Manisha
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Forum Post: RE: Linux/TMDSICE3359: PRU Ethernet usage questions
Thank you for your quick reply. I think I got what you mean. One more question: from the HW manual of ICEv2 dev board, it said both of the Ethernet ports should run in same control mode(either both in CPSW or both in PRU). Can I still use this board to let two port run under different modes at the same time if I change the software and firmware configuration?
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Forum Post: RE: CCS/TMS320C6678: ISR execute and receive data process in the hyplnk_exampleProject
Hi. Thank you for your reply. Do you have a product code?~~ I thought it would be relatively simple. It was hoped that only SW-generated interrupt would be reviewed. The source of the site provided was not felt to be the source of evm6678. Please review even if it takes time.
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Forum Post: RE: CCS/TMS320C6652: SPI boot failure
Hi Raja, Thank you for new information. After our research, I probably understood what is cause. For SPI Controller in Keystone, general spi mode 0(adoptive to NOR flash too) means Keystone's spi mode 1. And our custom board's default boot strap status to be applicable spi mode is 00(this means Keystone's spi mode 0). On the other hands, Micron NOR flash is compatible to spi mode 0 or 3(Keystone's 1 or 2). Therefore, the sequence of DEVSTAT register probably work as the follow. Therefore I think that our custom boards are working as spec however doesn't understand why EVM work as above. this fact confuse me so much. regards,
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Forum Post: RE: Compiler/AM5728: IF condition is not wroking properly with optimization enabled.
Hi Eric, In the shared code , in the function void hungarian_new_float(int size1, int size2, float Array[size1][size2], char Result[size1][size2]), line no 82, for (k_index = 0; k_index < m_size1; k_index++) { s_float = Array[k_index][0]; for (l_index = 1; l_index < n_size2; l_index++) if (Array[k_index][l_index] < s_float) s_float = Array[k_index][l_index]; In the above loop , for k_index = 1 , if condition is failing . We are passing a matrix to this function , incase of first row values are 3, 1, 5 and if condition is working fine , it gives 1 as the lowest in the row. But for the second row , values are 3, 2, 7 but if condition is saying 7 is lowest instead of 2 , this is the problem we are facing , we can add system_printf and we can print the results there. Regards, R D Nadaf
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Forum Post: RE: RTOS/TDA2EVM5777: About Display link in TIDL SemSeg Usecase
Hi, yes your understanding is correct but not completely. For field 1 having video buf the representation is same as attached picture but not for metadata buffer. Regards, Anuj
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Forum Post: RE: Linux/TDA2SX: Encounter error when calling system_init multiple times in different applications.
Hi, You can call it only once not multiple times. Regards, Anuj
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