Forum Post: RE: questions about L1D, MAR and cache coherence on C6657
Rahul,yes, it is some flag used for handshaning. Both pcie and core read and write to this variable in DDR as well as read it, of course at different stages of the handshaking operation. Those...
View ArticleForum Post: single/global/common/reference timer for all cores in 6670/6678
Hi Ti Folks, Wanted to profile custom communication between cores and in this regard wanted to know any global/common clock available across cores.objective: - From a common reference clock, i...
View ArticleForum Post: RE: dvr_rdk SharedRegion_isCacheEnabled issue
Hi BadriThanks for your reply.1. I am sure when stop video device , I didn't see the VIP overflow message. But when startrun usecase , the overflow message show ervery times.2. I will follow your...
View ArticleForum Post: what's wrong with my c6727?
I modified the example of dmax from team of TI,but it can't trigger the interrupt correctly.The example of dmax transfer the data internally using dmax module,but I want to transfer data from mcasp,so...
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Forum Post: Using Only EMIF0 (DDR0 interface).
My company developed TDA1MED system based on tms320dm8148 and TI_DM814x_BB_REVD.But, some harware configuration are different from the base. Especially, DDR1 interface is not used and all pins for DDR1...
View ArticleForum Post: could DM368 dvsdk2.10.01.18 support 32G SDHC except updating...
HI,My company product is based on dvsdk2.10.01.18 with linux kernal 2.6.18,I know there is a patch http://processors.wiki.ti.com/index.php/How_to_use_SDHC_on_DM365_with_MontaVista_5.0,Unfortunately It...
View ArticleForum Post: RE: DM8148 EVK VOUT[0]_CLK voltage level
Hi Steve,Thank you for your advises.Please refer to the attached PDF for the waveform when set to 1024x768.Vpp = 5.4V and Peak voltage to reference ground = 4.2V.When set to 800x480, the Vpp = 4.5 and...
View ArticleForum Post: dsp spend 17s ,but arm spend 5s
My chip omap3530.I portting my code in codec engine, test it and find it spend 17s.but in arm, it just 5s.can you give me some advice?
View ArticleForum Post: RE: DM8168 PCIe IpcFramesOutLink
The assert indicates the number of video frames in SwMs exceeds 64 frames for a single channel. Maintain a counter in your application and check the number of frame sent for a channel by...
View ArticleForum Post: RE: swMs Grey Color in Background
There is no support for changing background color at run time in swms.
View ArticleForum Post: RE: "Multi-Pass" FFT using DSPF_sp_fftSPxSP API.
Hi Rahul, Thank you for your answer. But unfortunately I need more clarifications for multi-pass FFT implementation and its result.Please take a look the following slide. My questions are colored in...
View ArticleForum Post: RE: Cann't dynamic change Resolution when Encoder have B frame
Pls attach patch having diff of changes done to enable B-frame encode support in dvr_rdk so that changes can be reviewed.you should disable processN APIs when using B-frame encode and you should free...
View ArticleForum Post: RE: How to enable the YPbPr output on DM36x ?
BTW， Customer is using IPNCRDK 4.0. Does this SW support YPbPr?Currently, customer's modification reports error on Debuf function.I also noticed that on DM365 EVM, it has fan out the YPbPr connector....
View ArticleForum Post: RE: OMAP-L137 (TMDSOSKL137) Uart 115200 doesn't work due to L137...
Hi Sivaraj,Thanks for your supports. There is no problem to push to higher baud rate in C6748 board and I have done this on the C6748 LCDK board. But this does not apply to the TMDSOSK137 board.I...
View ArticleForum Post: RE: question about dvrrdk3.0 decoder
There are several fields that have to be populated and just copying to bufVirtAddr is not enough.The issue is not due to 420SP format. Based on the usecase you are using refer...
View ArticleForum Post: RE: tms320vc5505 timer
Hi Seeni, Provide your code, so others can review it. Thanks.-kel
View ArticleForum Post: RE: McBSP example on LCDK C6748 fails.
Hi Siveraj,I think i could not explain my problem clearly. Actually we have a custom board which includes C6748 and we have lines attached for McBSP line 1 (not 0). For now my problem is that i get...
View ArticleForum Post: RE: Forced I-frame
I use the forced I-frame to initiate a new video recoding sequence.The new sequence must start with an I-frame. The old sequence is recording until the next I-frame occurs. This can happen by forcing...
View ArticleForum Post: RE: need TMDXEVM6486-4-625 design schematic
Hi Yufu,We do not provide schematics of TMDXEVM6486-4-625. For 6486 design details, please go the product folder and refer Technical Documents section in TI.com. Product folder:...
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