Forum Post: DM8168 capture more than 1080p
I use DVRRDK4.0.0.3 on DM8168. Our application is DM8168 capture video from FPGA outputing, and encode. FPGA output video resolution more than 1080P, sucn 2160x1600 or more. Can DM8168 capture video...
View ArticleForum Post: RE: Saving to External Memory for standalone operation
Hi RandyP,I appreciate the response. I understand how to interface the THS1206 to the C6713. I guess I was a bit unclear in my post. I am able to save data at a sample rate of > 5MSps using the...
View ArticleForum Post: RE: DM385 sd booting issues
Hi.I have the same issue on DM385 IPNC. RDK ver.3.5.I had compiled MLO and u-boot.bin(in Rules.make BINARY_MODE = sd, FULL_FUTURE).The output is completly the same. MLO is booted but u-boot failed to...
View ArticleClik here to view.
Forum Post: RE: C6657 EVM SPI Boot Problem
Hi Rahul,Here are the files.(Please visit the site to view this file)(Please visit the site to view this file)Thanks.Regards,Steve
View ArticleForum Post: RE: DMA with eZdsp 5535 help!
I tried an example i found on the DSP folder: csl_dma_intcExample.cand i get this error message: identifier "CSL_DmaRegsOvly" is undifinedi go to the line and it says: CSL_DmaRegsOvly dmaRegs;...
View ArticleForum Post: RE: DM816x RDK Support for Resolutions greater than 1080P
Thanks Badri:I'll try to follow-up with some bitstreams.1. Can the MpSclr be used on either SCLR?2. If the 5 MP image is 4x3 aspect ratio, what will happen to the image as it is scaled into 1080P....
View ArticleForum Post: Error with TMDXEVM6678L board
Hi all, I'd like to connect the TMDXEVM6678L board via PCIe and test it under desktop linux sdk to run the demo application. I did as this link...
View ArticleForum Post: RE: Fir Filter(lowpass)output is sometimes showing the value...
Stefan,Are you sure that the variable 'buf' inside FIR_filter is initialized to zero? On some platforms .bss is not zeroed to save configuration space. If 'buf' were initially filled with random data...
View ArticleForum Post: RE: OMAP-L138 secure AIS boot does not complete when writing to DDR
OK, I've written up a walking-ones memory tester that runs on the ARM from L2RAM and tests the DDR. All reads come back with the value 0x0000FFFF regardless of what was written, so it's pretty clear...
View ArticleForum Post: RE: TMS320DM8168 JTAG connection
Tim,I suggest you work with your local FAE/sales support to solve this issue since these processors are not designed to be used for non-system level use cases.BR,Steve
View ArticleForum Post: gpio_1 / sys_clkreq
I have a OMAP3530 based system where two GPIOs are tied together: GPIO_1 is tied to GPIO_70, and they are pulled up to 1.8V (VIO) via a 1kOhm resister.When the PADCONF for both pins is set to...
View ArticleForum Post: UBIFS mount failure due to uncorrectable data
TI folks,I'm on a DM814x project, and am using NAND geometry just like the DM814x-EVM (512 MB, 2048 write size, 64 bit OOB - MT29F4G16). I have all of the latest Arago patches, except those that...
View ArticleForum Post: RE: Some changes about the CSL with C55**
I know the reason. c5510 and c5515 should use different CSL.
View ArticleForum Post: RE: H.264 Encoder and RTP
Hi,Hongmei:My goal is run a demo TFTP input + H264 HP encode + RTP tx.Then I can using mplayer or vlc to display the bitstream in real-time.I think sv04ccs meet myneed.So I want to run sv04ccs you...
View ArticleForum Post: RE: question about usb on C6747
FIFO0 is documented as a 32-bit register but it is accessed as though it is a 8-bit register. The FIFO registers are the transfer registers from the interal 4KB RAM inside the USB controller. For...
View ArticleForum Post: RE: audio of TVP5158
I only use 1 TVP5158 and need to 4 channel audio data.The mapping is Audio_initTvp5158ChMapping(pPrm->numChannels)?Audio_initTvp5158ChMapping(): if (numChannels == 4) {...
View ArticleForum Post: RE: HDVPSS Firmware could not start
For the hdvpss firmware, the default usage in ezsdk 5.05.02.00 for firmware_loader isfirmware_loader <Processor Id> <Location of Firmware> <start|stop> without specifying with the...
View ArticleForum Post: RE: DM8168 capture more than 1080p
The pixel clock of VIP has limitation of 165MHz. You can estimate the capability of max resolution*fps.It looks fine that 2160x1600@25 or 30fps. Be careful that the total pixels per second shall not...
View ArticleForum Post: 5M JPG encode error
My customr meet below error msg when encoding 5M JPEG: links_m3video/iva_enc/encLink_common.c: (width <= UTILS_ENCDEC_RESOLUTION_CLASS_1080P_WIDTH) && (height <=...
View ArticleForum Post: RE: cant't boot from nand when sata disk connect, dm8168(ES2.1)
I don't think the NAND/SATA has confliction, as I have many customer has them in the design.Does this issue only seen on one board, or it is universal issue? Ever tried to replace the Nand flash?Try...
View Article