Hi Henry,
I'm glad that the DDR3 is operating but after reviewing your initialization, I have a few concerns that I wanted to ask about.
First, it looks like the values for write leveling initial ratios and the gate leveling initial ratios are identical to those found in 2.3 of the initialization application report. These values are calculated using the trace lengths of the DDR3 signals on your board. Did you calculate these values using the PHYCALC spreadsheet?
Secondly, there is a statement to OR and write to register DDR3_CONFIG_REG_23 which is needed for partial automatic leveling.
DDR3_CONFIG_REG_23 |= 0x00000200;
This statement is missing from the initialization sequence that you provided. Note that the DDR3 may operate if initialized incorrectly but it may not operate correctly across temperature of for all devices.
Regards, Bill