Hello Titus,
Thanks for the quick response. Yes, I have a NOR flash that uses chip select two. I ported existing program for NOR flash with read/write/boot function that worked with the C6712. When the write to the flash did not work., I noticed that the read cycle does not get generated while the write cycle worked fine as long as no read function included. Chip select two is configured properly. I had the address space for the flash start at address 0x6000 0000. Out of despair, I changed the address space for the flash to start at 0x6100 0000. The read I/O works fine with the write I/O at address 0x61xx xxxx. The write to the NOR flash worked OK too. I am satisfy with that since I do not need all address space assigned to chip select two. I still like to know why the address space 0x60xx xxxx behave unexpectedly. When I have SELSTRB_ENABLE, I get as many as 64 chip select sequence with one write command. The NAND is disable for chip select two and extended wait is also disable..
Monsef