Hi Mukul,
Thanks for the explanation. I do not write to the DRPYCR1 register in one go. The first instruction that writes to DRPYCR1 already exists in code. I add another instruction much later in the sequence that sets bit 13 of this register. Do you recommend that all this be done in one step? Scroll a few lines below for code snippet.
Titus,
Thanks for the info. We use our own config that is very similar to da850evm.h. Here's the config specific to our board. Note that the default configuration does not modify the DDL disable bit.
#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ DV_DDR_PHY_EXT_STRBEN | \ (0x3 << DV_DDR_PHY_RD_LATENCY_SHIFT))
The exact sequence of instructions used to disable the DLL refclk is listed below. Look for lines in bold text.
writel(CONFIG_SYS_DA850_DDR2_DDRPHYCR, &dv_ddr2_regs_ctrl->ddrphycr);
clrbits_le32(&davinci_syscfg1_regs->ddr_slew,
(1 << DDR_SLEW_CMOSEN_BIT));
/*
* SDRAM Configuration Register (SDCR):
* First set the BOOTUNLOCK bit to make configuration bits
* writeable.
*/
setbits_le32(&dv_ddr2_regs_ctrl->sdbcr, DV_DDR_BOOTUNLOCK);
/*
* Write the new value of these bits and clear BOOTUNLOCK.
* At the same time, set the TIMUNLOCK bit to allow changing
* the timing registers
*/
tmp = CONFIG_SYS_DA850_DDR2_SDBCR;
tmp &= ~DV_DDR_BOOTUNLOCK;
tmp |= DV_DDR_TIMUNLOCK;
writel(tmp, &dv_ddr2_regs_ctrl->sdbcr);
/* write memory configuration and timing */
writel(CONFIG_SYS_DA850_DDR2_SDBCR2, &dv_ddr2_regs_ctrl->sdbcr2);
writel(CONFIG_SYS_DA850_DDR2_SDTIMR, &dv_ddr2_regs_ctrl->sdtimr);
writel(CONFIG_SYS_DA850_DDR2_SDTIMR2, &dv_ddr2_regs_ctrl->sdtimr2);
/* clear the TIMUNLOCK bit and write the value of the CL field */
tmp &= ~DV_DDR_TIMUNLOCK;
writel(tmp, &dv_ddr2_regs_ctrl->sdbcr);
/*
* LPMODEN and MCLKSTOPEN must be set!
* Without this bits set, PSC don;t switch states !!
*/
#if 0 /* DLB_CHANGE */
writel(CONFIG_SYS_DA850_DDR2_SDRCR |
(1 << DV_DDR_SRCR_LPMODEN_SHIFT) |
(1 << DV_DDR_SRCR_MCLKSTOPEN_SHIFT),
&dv_ddr2_regs_ctrl->sdrcr);
#else
writel(CONFIG_SYS_DA850_DDR2_SDRCR |
DV_DDR_SDRCR_LPMODEN |
DV_DDR_SDRCR_MCLKSTOPEN,
&dv_ddr2_regs_ctrl->sdrcr);
#endif
/* CHANGE - START */
/* Disable DLL REFCLK */
#if 1
setbits_le32(&dv_ddr2_regs_ctrl->ddrphycr, 0x2000 );
#endif
/* CHANGE - END */
In the process of trying this change I managed to brick my board; the device fails to boot; it does not even get to the uboot prompt. Subsequent attempts to rewrite the flash image always fail with the error shown below (tried this using CCS and loadti.bat)
ARM9_0: GEL: Error while executing OnTargetConnect(): execution state prevented access at (*((unsigned int *) ((0x01C10000+0x800)+(4*LPSC_num)))&0x3F) [DLB_BLACKFOREST_ARM.gel:995] at PSC0_LPSC_enable(0, 0) [DLB_BLACKFOREST_ARM.gel:553] at PSC_All_On_Full_EVM() [DLB_BLACKFOREST_ARM.gel:251] at OnTargetConnect() .
Any thoughts on how I can recover from this situation?