hi Mukul :
I have the same problem, and somebody encounter the same problem also.
http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/99038.aspx
I have used a External 3.3V Clock Source,and use a resistor voltage divider. But it is no effect.
I want to know that the CLKMODE bit in PLLCTL is set to 1 or clear to 0,when use a a External 3.3V Clock Source.
Wheather the CLKMODE bit need to be set??