Forum Post: C6472 Atomic Access Monitor - SL2RAM Questions

1) When using the C6472 AAM instructions (LL,SL,CMTL) on S2LRAM, does the state of the SMC pre-fetch matter?

2) If we need to set up multiple monitor variables/addresses, is there any minimum spacing required between sequential variables (sizeof(int) or CACHE_L2_LINESIZE)?

3) The ammCrit functions in the SMQT libraries block until a lock can be obtained. That means a poorly behaving routine on Core 0 that won't release a lock can "hang" all other cores that attempt to secure a lock. Is there a version that will timeout and return an error instead?

Thanks,

Calvin