hello , Pavel
[quote[quote user="Pavel Botev"]
Have you enable/select these pins in the PINCNTLx MUXMODE bits?
[/quote]
since the evm nor flash is 64MB, my costomer board nor flash is 128MB, I add GPMC_A26, and since the costomer board use nor/XIP_MUX0,before I build the u-boot.bin I changed the pinmux setting in the following files:
1 lowlevel_init.S
#define GPMC_A12_MUX_VAL MODE(5)
#define GPMC_A13_MUX_VAL (MODE(2) | PULL_UP_EN)
#define GPMC_A14_MUX_VAL (MODE(2) | PULL_UP_EN)
#define GPMC_A15_MUX_VAL MODE(2)
#define GPMC_A16_MUX_VAL MODE(1)
#define GPMC_A17_MUX_VAL MODE(1)
#define GPMC_A18_MUX_VAL MODE(1)
#define GPMC_A19_MUX_VAL MODE(1)
#define GPMC_A20_MUX_VAL (MODE(1) | PULL_UP_EN)
#define GPMC_A21_MUX_VAL MODE(1)
#define GPMC_A22_MUX_VAL (MODE(1) | PULL_UP_EN)
#define GPMC_A23_MUX_VAL MODE(1)
#define GPMC_A24_MUX_VAL (MODE(2)| PULL_UP_EN)
#define GPMC_A25_MUX_VAL MODE(2)
#define GPMC_A27_MUX_VAL (MODE(8)| PULL_UP_EN)
changed to
#define GPMC_A12_MUX_VAL MODE(5)
#define GPMC_A13_MUX_VAL (MODE(5) | PULL_UP_EN)
#define GPMC_A14_MUX_VAL (MODE(5) | PULL_UP_EN)
#define GPMC_A15_MUX_VAL MODE(5)
#define GPMC_A16_MUX_VAL MODE(1)
#define GPMC_A17_MUX_VAL MODE(1)
#define GPMC_A18_MUX_VAL MODE(1)
#define GPMC_A19_MUX_VAL MODE(1)
#define GPMC_A20_MUX_VAL (MODE(1) | PULL_UP_EN)
#define GPMC_A21_MUX_VAL MODE(1)
#define GPMC_A22_MUX_VAL (MODE(1) | PULL_UP_EN)
#define GPMC_A23_MUX_VAL MODE(1)
#define GPMC_A24_MUX_VAL (MODE(2)| PULL_UP_EN)
#define GPMC_A25_MUX_VAL MODE(2)
#define GPMC_A26_MUX_VAL MODE(2)
#define GPMC_A27_MUX_VAL (MODE(8)| PULL_UP_EN)
add
....
gpmc_a25_addr:
.word GPMC_A25
gpmc_a26_addr: //add
.word GPMC_A26 // add
gpmc_a27_addr:
.word GPMC_A27
......
gpmc_a25_mux_val:
.word GPMC_A25_MUX_VAL
gpmc_a26_mux_val: //add
.word GPMC_A26_MUX_VAL //add
gpmc_a27_mux_val:
.word GPMC_A27_MUX_VAL
......
ezsdk_5_05\board-support\u-boot-2010.06-psp04.04.00.01\arch\arm\include\asm\arch-ti81xx\Cpu.h
#define GPMC_A1 (CTRL_BASE + 0x09D0)
#define GPMC_A2 (CTRL_BASE + 0x09D4)
#define GPMC_A3 (CTRL_BASE + 0x09D8)
#define GPMC_A4 (CTRL_BASE + 0x09DC)
#define GPMC_A5 (CTRL_BASE + 0x0A9C)
#define GPMC_A6 (CTRL_BASE + 0x0AA0)
#define GPMC_A7 (CTRL_BASE + 0x0AA4)
#define GPMC_A8 (CTRL_BASE + 0x0AA8)
#define GPMC_A9 (CTRL_BASE + 0x0AAC)
#define GPMC_A10 (CTRL_BASE + 0x0AB0)
#define GPMC_A11 (CTRL_BASE + 0x0AB4)
#define GPMC_A12 (CTRL_BASE + 0x0AB8)
#define GPMC_A12 (CTRL_BASE + 0x0AB8)
#define GPMC_A13 (CTRL_BASE + 0x0B8C)
#define GPMC_A14 (CTRL_BASE + 0x0B90)
#define GPMC_A15 (CTRL_BASE + 0x0B94)
#define GPMC_A16 (CTRL_BASE + 0x09A0)
#define GPMC_A17 (CTRL_BASE + 0x09A4)
#define GPMC_A18 (CTRL_BASE + 0x09A8)
#define GPMC_A19 (CTRL_BASE + 0x09AC)
#define GPMC_A20 (CTRL_BASE + 0x09B0)
#define GPMC_A21 (CTRL_BASE + 0x09B4)
#define GPMC_A22 (CTRL_BASE + 0x09B8)
#define GPMC_A23 (CTRL_BASE + 0x09BC)
#define GPMC_A24 (CTRL_BASE + 0x09EC)
#define GPMC_A25 (CTRL_BASE + 0x09E8)
#define GPMC_A27 (CTRL_BASE + 0x09CC)
#define GPMC_CS0_REG (CTRL_BASE + 0x09E4)
#define GPMC_OEN (CTRL_BASE + 0x0A00)
#define GPMC_WEN (CTRL_BASE + 0x0A04)
changed to
#define GPMC_A1 (CTRL_BASE + 0x0BCC)
#define GPMC_A2 (CTRL_BASE + 0x0BD0)
#define GPMC_A3 (CTRL_BASE + 0x0BD4)
#define GPMC_A4 (CTRL_BASE + 0x0BD8)
#define GPMC_A5 (CTRL_BASE + 0x0BDC)
#define GPMC_A6 (CTRL_BASE + 0x0BE0)
#define GPMC_A7 (CTRL_BASE + 0x0BE4)
#define GPMC_A8 (CTRL_BASE + 0x0BE8)
#define GPMC_A9 (CTRL_BASE + 0x0BEC)
#define GPMC_A10 (CTRL_BASE + 0x0BF0)
#define GPMC_A11 (CTRL_BASE + 0x0BF4)
#define GPMC_A12 (CTRL_BASE + 0x0BF8)
#define GPMC_A13 (CTRL_BASE + 0x0BFC)
#define GPMC_A14 (CTRL_BASE + 0x0C00)
#define GPMC_A15 (CTRL_BASE + 0x0C04)
#define GPMC_A16 (CTRL_BASE + 0x09A0)
#define GPMC_A17 (CTRL_BASE + 0x09A4)
#define GPMC_A18 (CTRL_BASE + 0x09A8)
#define GPMC_A19 (CTRL_BASE + 0x09AC)
#define GPMC_A20 (CTRL_BASE + 0x09B0)
#define GPMC_A21 (CTRL_BASE + 0x09B4)
#define GPMC_A22 (CTRL_BASE + 0x09B8)
#define GPMC_A23 (CTRL_BASE + 0x09BC)
#define GPMC_A24 (CTRL_BASE + 0x09C0)
#define GPMC_A25 (CTRL_BASE + 0x09C4)
#define GPMC_A26 (CTRL_BASE + 0x09C8)
#define GPMC_A27 (CTRL_BASE + 0x09CC)
#define GPMC_CS0_REG (CTRL_BASE + 0x09E4)
#define GPMC_OEN (CTRL_BASE + 0x0A00)
#define GPMC_WEN (CTRL_BASE + 0x0A04)
\ezsdk_5_05\board-support\u-boot-2010.06-psp04.04.00.01\board\ti\ti8148\Evm.c
static struct nor_pad_config nor_pad_cfg[] = {
...
{GPMC_A1, MODE(2) | PULL_UP_EN},
{GPMC_A2, MODE(2) | PULL_UP_EN},
{GPMC_A3, MODE(2) | PULL_UP_EN},
{GPMC_A4, MODE(2) | PULL_UP_EN},
{GPMC_A5, MODE(5) | PULL_UP_EN},
{GPMC_A6, MODE(5)},
{GPMC_A7, MODE(5)},
{GPMC_A8, MODE(5)},
{GPMC_A9, MODE(5)},
{GPMC_A10, MODE(5) | PULL_UP_EN},
{GPMC_A11, MODE(5)},
{GPMC_A12, MODE(5)},
{GPMC_A13, MODE(2) | PULL_UP_EN},
{GPMC_A14, MODE(2) | PULL_UP_EN},
{GPMC_A15, MODE(2)},
{GPMC_A16, MODE(1)},
{GPMC_A17, MODE(1)},
{GPMC_A18, MODE(1)},
{GPMC_A19, MODE(1)},
{GPMC_A20, MODE(1) | PULL_UP_EN},
{GPMC_A21, MODE(1)},
{GPMC_A22, MODE(1) | PULL_UP_EN},
{GPMC_A23, MODE(1)},
{GPMC_A24, MODE(2) | PULL_UP_EN},
{GPMC_A25, MODE(2)},
{GPMC_A27, MODE(8) | PULL_UP_EN},
...
}
changed to
static struct nor_pad_config nor_pad_cfg[] = {
...
{GPMC_A1, MODE(5) | PULL_UP_EN},
{GPMC_A2, MODE(5) | PULL_UP_EN},
{GPMC_A3, MODE(5) | PULL_UP_EN},
{GPMC_A4, MODE(5) | PULL_UP_EN},
{GPMC_A5, MODE(5) | PULL_UP_EN},
{GPMC_A6, MODE(5) | PULL_UP_EN},
{GPMC_A7, MODE(5) | PULL_UP_EN},
{GPMC_A8, MODE(5) | PULL_UP_EN},
{GPMC_A9, MODE(5) | PULL_UP_EN},
{GPMC_A10, MODE(5) | PULL_UP_EN},
{GPMC_A11, MODE(5) | PULL_UP_EN},
{GPMC_A12, MODE(5) | PULL_UP_EN},
{GPMC_A13, MODE(5) | PULL_UP_EN},
{GPMC_A14, MODE(5) | PULL_UP_EN},
{GPMC_A15, MODE(5) | PULL_UP_EN},
{GPMC_A16, MODE(1) | PULL_UP_EN},
{GPMC_A17, MODE(1) | PULL_UP_EN},
{GPMC_A18, MODE(1) | PULL_UP_EN},
{GPMC_A19, MODE(1) | PULL_UP_EN},
{GPMC_A20, MODE(1) | PULL_UP_EN},
{GPMC_A21, MODE(1) | PULL_UP_EN},
{GPMC_A22, MODE(1) | PULL_UP_EN},
{GPMC_A23, MODE(1) | PULL_UP_EN},
{GPMC_A24, MODE(2) | PULL_UP_EN},
{GPMC_A25, MODE(2) | PULL_UP_EN},
{GPMC_A26, MODE(2) | PULL_UP_EN},
{GPMC_A27, MODE(8) | PULL_UP_EN},
...
}
Am I right. any other changes to be add in the u-boot source code?
[quote user="Pavel Botev"]
Have you build the u-boot.bin with the ti8148_evm_config_nor config?
[/quote]
yes
[quote user="Pavel Botev"]
Are you aligned with the below user guide?
http://processors.wiki.ti.com/index.php/TI81XX_PSP_NOR_Driver_Guide
[/quote]
yes.
Best Regards,
Pavel