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Forum Post: RE: optimizing EDMA PCIe transfers for read/write and multiple cores

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Jeff,

From throughput point of view, I do not see much difference between transfer queues in EDMA0 and EDMA1 with the same DBS.

For the bus latency point of view, please take a look at Chapter 4 System Interconnect in C6678 data manual. The EDMA1 and PCIe slave are connected to the same TeraNet_3_A, while EDMA0 needs to go through TeraNet_2_A and Bridge 2/3 to PCIe slave port. 

So you might observe that EDMA0 performs slower than EDMA1 for PCIe transfer, especially if any other concurrent traffic on Bridge 2/3. 


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