Forum Post: RE: C6678 SRIO endianess

Hi Travis

        Thank you for answering.Since B0 - B15 is the data in lanes, I am puzzled by such questions:

        1. Does bit map in VBUS map to the memory address? In other words, does VBUS 7:0 stored in Addr, VBUS15:8 stored in Addr+1?

        2. Does the endianess reverse executed automatically when C6678 in little endianess? When C6678 in mode A, can we make sure that any transfer between any C6678, no matter they have same endianess or different endianess, the transfer will be byte-to-byte orderly?

        3.Is the same kind of reverse handled in any device in little endianess who has srio peripheral ?

        Regards,

        Yuchao