Forum Post: On C66x CorePac Registers, MAR and MPAX

Hello everyone,

(CCS 5.5, EVMC6678)

On C6678 data manual there is the following memory map :

Logical address start 01800000  end 01BFFFFF bytes 4M description C66x CorePac Registers

On the CorePac User Guide

address 0184 8284h MAR161 Memory Attribute Register 161

My understanding was : a) there is ONE set of MAR registers for ALL cores

I concluded that : b) only ONE core needs to do MAR initialisation (like disabling cacheability of MAR161)

However it appears in my example that : c) ALL cores needs to do the MPAX configuration.

My question is : why all cores should do c) ?

Thank you,

Clement