Hell,TI sir.
in our board,we use DSP to perform audio echo cancel.However,for a mass data progressing,DSP's load is high.And If we enable the aec with DSP,the M3 codec will not generate h.264 stream.
We have experienced the similar things many times.One core(a8/dsp/m3 codec/m3 video)'s high load will affect another core's operation,the "victim" is m3 codec or video most of time.
I think,for DM8168,there is only one DDR controller,so in 8168 only one core can run most of time.Or else the core can only run with the data in cache and cache is little compared to Audio/Video data.
In dm8168,every core need to balance its load for a safe run?