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Forum Post: RE: 6455 SRIO speed

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I had carefully checked the code from testdio_edmastreamlsu example of diolib library. From there I found out that interrupts after succesful sending of 4kb block are disabled. But, I still wonder how the register INTDST_RATE_CNTL would be refreshed. Documentation tells that new value should be put there after each RIOINT call. When transaction is completed I should clean LSU_ICSR reg and set INTDST_RATE_CNTL register. 

PS: Also, i have noticed that in DIO_rawEdmaLsuSetup function there are two chaining edma channels that are needed for updating of intdst_rate_cnt and lsu_iccr. But I can not find the place where they are triggered...


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