My customer need the display controller integrated. Hence DRA821 and AM64 can not meet their project requirement. Please recommend the appropriate part with Quad Port Gigabit Ethernet and MIPI-DSI or LVDS support. How about DRA829V which does not include C7x DSP, Deep Learnig engine and VPAC subsystems, Morever the unit price of DRA829V seems be less than AM6548.
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Forum Post: RE: AM6548: Quad Port Gigabit Ethernet support by PRU
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Forum Post: RE: AM625: AM625 HS-FS Kernel Crash at am65-cpsw-nuss driver loading
Hi, I will need to discuss this issue with the developer who is currently out of the office until next week. I will respond mid next week with additional information. Best Regards, Schuyler
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Forum Post: RE: SK-AM62: SK-AM62 CPU core limit
How about after that about the question you asked? Best Regards, TO
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Forum Post: RE: AM625: AM625 HS-FS Kernel Crash at am65-cpsw-nuss driver loading
Hi Schuyler, Thanks for the update regarding support. Best Regards, Naga Prasad.
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Forum Post: RE: PROCESSOR-SDK-AM62X: Not able to see the create dtbo files for camera sensor ov5647 ?
Hi root@xxx:~# v4l2-ctl --list-devices TI-CSI2RX (platform:30102000.ticsi2rx): /dev/media0 Cannot open device /dev/video0, exiting. Getting this kind of error I am using this below dts file. // SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; /plugin/; #include / { fragment@101 { target-path = "/"; __overlay__ { clk_ov5647_fixed: ov5647-xclk { compatible = "fixed-clock"; #clock-cells = ; clock-frequency = ; }; }; }; }; &main_i2c2 { #address-cells = ; #size-cells = ; status = "okay"; i2c-switch@71 { compatible = "nxp,pca9543"; #address-cells = ; #size-cells = ; reg = ; /* CAM port */ i2c@1 { #address-cells = ; #size-cells = ; reg = ; ov5647: camera@36 { compatible = "ovti,ov5647"; reg = ; clocks = ; clock-names = "xclk"; //reset-gpios = ; pwdn-gpios = ; port { csi2_cam0: endpoint { remote-endpoint = ; clock-lanes = ; data-lanes = ; }; }; }; }; }; }; &csi0_port0 { status = "okay"; csi2rx0_in_sensor: endpoint { remote-endpoint = ; bus-type = ; /* CSI2 DPHY. */ clock-lanes = ; data-lanes = ; }; };
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Forum Post: RE: PROCESSOR-SDK-AM62X: Not able to see the create dtbo files for camera sensor ov5647 ?
I want to capture images and video. Can you please support what are the missing change to resolve capture issue ?
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Forum Post: RE: TDA4VL-Q1: TIDL-RT: cannot find -lIlmImf: No such file or directory
Hello Wilson, How did you solve your issue?
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Forum Post: AM623: MCU-PLUS-SDK: Two parallel tasks end in HardFault_Handler
Part Number: AM623 Hi, I'm using the mcu plus SDK 09.01.00.39 to develop a FreeRTOS application for the AM62x M4F core. to get familiar with the SDK, I create a gpio led blinky and uart loopback task. Each task works fine if I just compile and flash the task. However, as soon as I run both in parallel, tI can see some debug output and after a very short time system hangs. During a debug run in CCS, I was able to figure out the M4 stucks in the HardFault_Handler. How do I figure out what triggered the HardFault? main function: #define GPIO_LED_BLINK_TASK_PRI (tskIDLE_PRIORITY + 2) #define UART_LOOPBACK_TASK_PRI (tskIDLE_PRIORITY + 1) #define STACK_SIZE (16384U / sizeof(configSTACK_DEPTH_TYPE)) StackType_t xStack[STACK_SIZE] __attribute__((aligned(32))); StaticTask_t mainTaskObj; TaskHandle_t mainTask; void gpio_led_blink_task(TaskHandle_t *task, int priority); void uart_loopback_task(TaskHandle_t *task, int priority); int main() { TaskHandle_t gpioTask; TaskHandle_t uartTask; System_init(); Board_init(); Drivers_open(); DebugP_assert(Board_driversOpen() == SystemP_SUCCESS); gpio_led_blink_task(&gpioTask, GPIO_LED_BLINK_TASK_PRI); uart_loopback_task(&uartTask, UART_LOOPBACK_TASK_PRI); vTaskStartScheduler(); Board_driversClose(); Drivers_close(); DebugP_assertNoLog(0); return 0; } gpio_led_blink task: #define STACK_SIZE (1024U / sizeof(configSTACK_DEPTH_TYPE)) StackType_t xStack[STACK_SIZE] __attribute__((aligned(32))); StaticTask_t xTaskBuffer; void gpio_led_blink(void *args) { uint32_t gpioBaseAddr, pinNum; DebugP_log("Start gpio_led_blink_main\r\n"); gpioBaseAddr = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LED_BASE_ADDR); pinNum = GPIO_LED_PIN; GPIO_setDirMode(gpioBaseAddr, pinNum, GPIO_LED_DIR); while(1) { GPIO_pinWriteHigh(gpioBaseAddr, pinNum); vTaskDelay(MSEC_TO_TICKS(100)); GPIO_pinWriteLow(gpioBaseAddr, pinNum); vTaskDelay(MSEC_TO_TICKS(250)); GPIO_pinWriteHigh(gpioBaseAddr, pinNum); vTaskDelay(MSEC_TO_TICKS(100)); GPIO_pinWriteLow(gpioBaseAddr, pinNum); vTaskDelay(SEC_TO_TICKS(1)); } vTaskDelete(NULL); } void gpio_led_blink_task(TaskHandle_t *task, int priority) { *task = xTaskCreateStatic(gpio_led_blink, "gpio_led_blink", STACK_SIZE, NULL, priority, xStack, &xTaskBuffer); configASSERT(*task != NULL); } uart_loopback task: #define STACK_SIZE (1024U / sizeof(configSTACK_DEPTH_TYPE)) StackType_t xStack[STACK_SIZE] __attribute__((aligned(32))); StaticTask_t xTaskBuffer; #define APP_UART_BUFSIZE (200U) #define APP_UART_RECEIVE_BUFSIZE (8U) volatile uint32_t gNumBytesRead = 0U; void uart_loopback(void *args) { UART_Transaction trans; int32_t transferOK; char uartBannerBuffer[APP_UART_BUFSIZE]; uint8_t uartReceiveBuffer[APP_UART_RECEIVE_BUFSIZE]; DebugP_log("Start uart_loopback\r\n"); UART_Transaction_init(&trans); trans.timeout = 100; trans.buf = &uartBannerBuffer[0U]; strncpy(&uartBannerBuffer[0U], "AM62x M4F Demo Firmware\r\n", APP_UART_BUFSIZE); trans.count = strlen(trans.buf); transferOK = UART_write(gUartHandle[CONFIG_UART0], &trans); DebugP_assert((transferOK != SystemP_FAILURE)); trans.buf = &uartReceiveBuffer[0U]; while(1) { trans.count = APP_UART_RECEIVE_BUFSIZE; transferOK = UART_read(gUartHandle[CONFIG_UART0], &trans); DebugP_assert((transferOK != SystemP_FAILURE)); if (trans.count) { transferOK = UART_write(gUartHandle[CONFIG_UART0], &trans); DebugP_assert((transferOK != SystemP_FAILURE)); } vTaskDelay(MSEC_TO_TICKS(100)); } vTaskDelete(NULL); } void uart_loopback_task(TaskHandle_t *task, int priority) { *task = xTaskCreateStatic(uart_loopback, "uart_loopback", STACK_SIZE, NULL, priority, xStack, &xTaskBuffer); configASSERT(*task != NULL); }
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Forum Post: DRA79XEVM: DRA79x EVM CPU board - eAVB Android
Part Number: DRA79XEVM Hi Feature : Implementation of Audio/Video Talker - Listener using 2 DRA79X EVB Boards. I see this EVM board supports GB Ethernet AVB and Android OS. Could you please let us know, Does TI Android release have support for AVB, that required to implement the Video Talker & Listener? To implement Listener & Talker using two DRA79X boards, does DRA79x EVM board require any external hardware (as daughter boards). Please suggest. What are the Audio & Video codecs supported by DRA79X processor, no information available in the user manual. (H.264/H.265) thanks Ganapathi
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Forum Post: RE: TDA4VE-Q1: Rendering artifacts while using opengl + R5F display node on SDK9.1
Erick, Quick update regarding the 64K pages, we are still testing this change. Regarding the statistics, is there something else that we could monitor which would give us more information about the memory bandwidth used at different places in the SoC? On the other side, if PL tests give you other ideas, let us know. Thanks,
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Forum Post: RE: AM6422: icssg_prueth port initializing but not able to connect.
Hello Vaibhav and Dan, Thanks for sharing the additional information. We will have our hardware team review this. [quote userid="576780" url="~/support/processors-group/processors/f/processors-forum/1343344/am6422-icssg_prueth-port-initializing-but-not-able-to-connect/5185260#5185260"] Can you try testing the icssg ethernet interface at 10Mbps? The idea is to configure to a lower speed to drop the RX clock rate down to a lower speed, to help make the MAC more tolerant of any timing issues. The goal is to check if rx_good_frames are detected or at the very least if we can see more than just a single rx_crc_error. You can do this by using "ethtool -s eth2 speed 10" and make sure to do the equivalent for your host PC/link partner.[/quote] Can you try this as well and let us know about your findings? While this doesn't not directly solve the issue, it would give us more clues about why it seems like the ARP reply message is not being detected at all on the RX path of the icssg ethernet interface (no rx_good_frames, and only single digit crc_error_frames etc). -Daolin
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Forum Post: RE: SK-AM62A-LP: Monochrome image processing capabilities
Hello, As per further discussion Auto white balance will not impact on monochrome images so this feature is not required. Could you please provide information in remaining points as below: 1. Will Auto exposure functionality work with ISP on monochrome image sensor? 2. If monochrome images (8/10 bit luma data) are provided to ISP then what will be the format of output processed image? 3. Can we convert monochrome image(8/10 bit Luma Data) in to JPEG using hardware JPEG encoder? As per datasheet it only supports YUV images at input. Doesn't it will work for monochrome images? Thanks
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Forum Post: RE: PROCESSOR-SDK-AM62X: AM62x: rpmsg_char_zerocopy
Hi Nick, Our implementation is referring to the zerocopy example, i.e. using the "dma-buf-phys" driver and using "dma-heap-carveout" to reserve shared memory. Just checking, will both the "dma-buf-phys" driver and "dma-heap-carveout" still available in SDK 10.0 / Linux kernel 6.6 ? Or we have to update accordingly for our implementation when using SDK 10.0 / Linux kernel 6.6 ? rgds, kc Wong
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Forum Post: RE: AM625: Biometric module
Hello Thanks for the interest. No we do not have any reference designs for biometric modules etc with our AM6 family or SDK. SDK provides basic drivers and application enablement for the features you see on the EVM. To build something end equipment specific like Biometric (fingerprint, or face recoginition etc) you may need to develop your own or work with 3P. You can look at some of the demos in the design gallery and contact the recommended 3Ps that own such demos https://dev.ti.com/tirex/explore/node?node=A__AEIJm0rwIeU.2P1OBWwlaA__com.ti.Sitara_AM62_Design_Gallery__tKVY6Wy__LATEST ( look for Multicore Ware and Plumer AI demos on the link above)
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Forum Post: RE: PROCESSOR-SDK-AM62X: AM62x: rpmsg_char_zerocopy
Hi Nick, Our implementation is referring to the zerocopy example, i.e. using the "dma-buf-phys" driver and using "dma-heap-carveout" to reserve shared memory. Will do more testing on the implementation. root@p550:/firmware/user# ./TestIpc Created endpt device rpmsg-char-9-744, fd = 4 port = 1025 A.01.00 dma-buf address: 0xa6000000 a6000000 0xffffb7bc4000 A53: Hello World from A53 !!! M4F: Hello World from M4F !!! root@p550:/firmware/user# cat /sys/kernel/debug/remoteproc/remoteproc0/trace0 [m4f0-0] 0.001463s : [IPC RPMSG ECHO] FW Revision: A.01.00 (May 10 2024 15:18:41): [m4f0-0] 0.010437s : [IPC RPMSG ECHO] Remote Core waiting for messages at end point 10 ... !!! [m4f0-0] 3.203430s : A53: Hello World from A53 !!! [m4f0-0] 3.203694s : root@p550:/firmware/user# ls /dev/dma_heap/carveout_apps-shared-memory /dev/dma_heap/carveout_apps-shared-memory root@p550:/firmware/user# ls /dev/dma-buf-phys /dev/dma-buf-phys root@p550:/firmware/user# Just checking, will both the "dma-buf-phys" driver and "dma-heap-carveout" still available in SDK 10.0 / Linux kernel 6.6 ? Or we have to update accordingly for our implementation when using SDK 10.0 / Linux kernel 6.6 ? rgds, kc Wong
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Forum Post: RE: AM6442: OSPI driver which supports training on SDR mode
Hi Hideaki, Apologies in delayed responses. I am going to clarify your doubts. [quote userid="10509" url="~/support/processors-group/processors/f/processors-forum/1321893/am6442-ospi-driver-which-supports-training-on-sdr-mode/5172292#5172292"] They want to confirm again with you. Are this errata i2189 Workaround 1, 2 and 3 not needed as long as API OSPI_phyTuneDDR() of a new ospi_phy.c is used ? If the i2189 errata Workar [/quote] So, as of today the errata says the following: In the current/latest SDK ospi_phy_dqs.c file, you will find the API termed as OSPI_phyTuneDDR(), this calls the OSPI_phyFindOTP1(). The find OTP API is the crucial API which takes care of the errata as mentioned and attached in the screenshot. A detailed description of the flow of finding OTP will be extremely helpful for the customers, please share this link with them for the same: https://software-dl.ti.com/mcu-plus-sdk/esd/AM62X/latest/exports/docs/api_guide_am62x/DRIVERS_OSPI_PAGE.html#autotoc_md522 [quote userid="10509" url="~/support/processors-group/processors/f/processors-forum/1321893/am6442-ospi-driver-which-supports-training-on-sdr-mode/5172292#5172292"]They want to confirm again with you. Are this errata i2189 Workaround 1, 2 and 3 not needed as long as API OSPI_phyTuneDDR() of a new ospi_phy.c is used ?[/quote] So to answer your question, yes they can proceed with the mode you have mentioned. Regards, Vaibhav
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Forum Post: RE: TDA4VM: Setup the communication between PC and TDA4x using ethernet
Hi, As your requirement will be input from PC and output to PC. Is input from and output to same PC? If yes, why you need to transfer to TI device in between? If both input and output are different PCs then you need more than one Physical port. Which means you need to use CPSW9G. For CPSW9G use EthFw to enable multiple CPSW ports. Enet will enable only one of CPSW Port. Best Regards, Sudheer
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Forum Post: AM6442: HW breakpoints
Part Number: AM6442 Hi, I am unable to use a HW breakpoint. I checked that E2E post https://e2e.ti.com/support/tools/code-composer-studio-group/ccs/f/code-composer-studio-forum/1273285/hardware-breakpoint?tisearch=e2e-sitesearch&keymatch=PRU%2520hardware%2520breakpoint but when i right click I don't get to choose to implement a HW or SW breakpoint. I am using the latest CCS version and an assembly file. Regards Geoffrey
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Forum Post: RE: AM625: Implementing thermal shut down
Tashiro-san My initial reaction is that they need to work with VxWorks to put this requirement in and manage it. I do not think they should implement it asynchronous to their VxWork framework, as there maybe some recovery required. We are not VxWorks experts, has your customer check with VxWorks already on what they can or cannot support.
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Forum Post: RE: J722SXH01EVM: How to configure tidss driver for HDMI output prior to /sbin/init
Thanks Keerthy, This helped me find the rest of the missing modules. I needed to include everything for drm that was missing from a good run. This means: drm 561152 13 sii902x ,drm_kms_helper,drm_dma_helper, display_connector , pvrsrvkm ,tidss It's working, thanks again!
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