Hi, the steps you wrote do use the "sf" commands, there is nothing wrong with it. And I have no issues using "sf" to read/write flash, and ROM loader to boot from it. The question was: even if U-Boot uses config mode to read/write QSPI via "sf" command, what does mean "mapped at"? For me, using "cp length" should make a copy of QSPI flash to RAM since the QSPI is mapped for reading. U-Boot's "cp" is flash-aware, so it should understand that some address is in flash, and use proper method to read/write it. It works in both directions for parallel NOR flash mapped at 08000000. But since it does not work for "cp" from QSPI, it may mean that U-Boot "thinks" that the memory is mapped, and just does memcpy(), but there is no real mapping, and thus no QSPI data is copied. Please, feel free to close this thread if desired. The main question of booting was resolved. But I still do not understand why mapped GPMC/NOR works (can be read/write with "cp"), but mapped QSPI can't be read with the same "cp". I think that "sf read/write" must work in any case (using config mode and QSPI commands), but "cp" should also read QSPI content if it is mapped at address space.
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Forum Post: RE: AM5716: QSPI boot issue
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Forum Post: RE: 66AK2H12: EDMA speed performance decrease due to SRIO
Hi Eric, Sorry, I am asking customer and waiting their response.
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Forum Post: RE: RTOS/AMIC110: Mismatch between CoE EtherCAT and input data
Hi Giulio, we documented some steps on how to change/add PDO in our PRU-ICSS EtherCAT slave troubleshooting guide . You mentioned you uses SSC tool, the document shows steps for manually doing this process. However, could you please take a look? maybe worthy to check that new generated files via SSC tool have similar instructions/structure to what is mentioned in this troubleshooting guide. thank you, Paula
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Forum Post: RE: PCIe interrupt set in RC-mode
Hi. Thank you for your answer. I'll check your answers. I was testing without an EP by setting up RC-mode with evmc6678. It was a test to confirm whether the ISR was executed. During the data survey, I could see the contents of a similar test. e2e.ti.com/.../223849 ISR runs only were received through PCIe lines, it said. Is correct?? I thought the ISR needed to be implemented without an EP. I'll investigate further.
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Forum Post: RE: Linux/PROCESSOR-SDK-AM335X: Ethernet boot on custom board
Thanks Krunal, We did a small mistake. We've to connect eth0 interface of the board with the host system. but we connected eth1 port and did the procedure. Now we are trying with eth0 and I'll let you know if any problem is there. Regards Vamsi
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Forum Post: RE: TDA2SX: Connecting DS90UB934 to TDA2SX
TDA2x VIP can capture 10-bit data by setting the VIP in 16-bit mode. Whether to capture 10-bit or 8-bit depends on if you want to process 10-bit data or not. If you want to process 10-bit, no need of any shift. If you want to process only 8-bit, then it is better to shift the 10-bit to D7:D0 of VIP. Otherwise we need to do this processing in CPU which takes cycles. 10-bit processing: Sensor D9:D0 goes to VIP D9:D0. Ground D15:D10 of VIP. 8-bit processing: Sensor D9:D2 goes to VIP D7:D0 (Shifted). Sensor lines D1, D0 (LSB) not used
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Forum Post: RE: TDA2SX: What IDE is recommended to customize the Vision SDK?
Hi Zach, I am not an expert on Radar SDK. I would suggest you to post a separate question for your query about source code. Regards, Rishabh
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Forum Post: RE: Linux/AM3358: 4G USB Simcom module IC detect issue
we soldered 5v line to VBUS of TPD4S012 ic
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Forum Post: RE: Linux/AM3358: Custom board boot issue
Hello Aleksandar, Thank you for sharing the solution. Cold you also mark the solution as "This resolved my Issue". Thanks, Kemal
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Forum Post: RE: Linux: eMMC cannot boot on MMC0 am335x
Hello Mouri89, You need to modify the loadimage U-Boot environment variable. Please, see this thread for more details. Note: If you put the SD card (4GB) on MMC0, eMMC 16GB on MMC1 and use the latest Processor SDK, it would be great. Best regards, Kemal
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Forum Post: RE: Linux/AM5718: PRU Ethernet does not work
Hi Nick, I have configured the reset-gpios for pruss2_mdio but still the PRU-Ethernet won't work. So could you update us about the RXLINK for conclude this issue. Regards, suresh
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Forum Post: RE: 66AK2H14: 1 GBE 5 Port Ethernet Switch is not designed to transmit data on multiple port parallel
Hi, In pdk_k2hk_4_0_12 Example folder There is an NIMU_emacExample that use NDK . I can not use NDK because I have to use multiple core to transmit data through Ethernet port. I also use PA_emacExample_K2HC66BioseExampleProject which do not use NDK but it does not give me full data rate but good thing is that I can transmit data on both Ethernet port one by one. I think there are some overheads in PA_emacExample that limit the data rate. Is there anyway that I use NIMU_emacExample and bypass NDK. I have also seen bare metal Ethernet in directory C:\ti\pdk_k2hk_4_0_12\packages\ti\transport\bmet_eth but I can not import it in code composer studio. Please guide me from which example should I start Again my task is to transmit RAW Ethernet Packet to at full data rate to external world that is FPGA I am not using any network protocol its just RAW data so I can bypass packet and security accelerator. regards, Umer
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Forum Post: RE: RTOS/TDA2PXEVM: High display latency in iss_capture_isp_simcop_display usecase
Hi Andrey, The display where it shows 90ms latency is not really running, the fps reported is all 0s. I think the first display is where iss output is connected and the latency in that is around 14ms.. Rgds, Brijesh
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Forum Post: RE: Linux: eMMC cannot boot on MMC0 am335x
Hi Kemal R. Shakir , Thanks so much for your help, i had done your guideline, it cannot not boot. I think my uboot source code base beagle bone black, it has some pin in MMC0 to network device. I will check my hardware. Thanks so much!
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Forum Post: Linux/AM5718: Single EMAC configuration
Part Number: AM5718 Tool/software: Linux Hi, I had trouble in changing the dual emac model into the one,as Our project has redesigned the baseboard. I had change the dtb,as i had did these things or their combination. &mac { status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = ; pinctrl-1 = ; //dual_emac; }; &cpsw_emac0 { phy-handle= ; phy-mode = "rgmii"; // dual_emac_res_vlan = ; }; /* &cpsw_emac1 { phy-handle= ; phy-mode = "rgmii"; dual_emac_res_vlan = ; }; */ thanks a lot
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Forum Post: RE: ISS_CAPTURE failure in Radar SDK
Hi Saito-san, If they have connected it PHY 0 of CSI2 and assuming virtual channel is 0, please check contents of 0x489B 0354, this should increment. If the virtual channel is different please check 0x489B 0354 + <virtual channel number * 4) If the PHY is PHY 1, please check 0x489B 0354 + 0x80. Regards, Sujith
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Forum Post: RE: RTOS/TDA2HV: patch of A15 SMP NDK based on Vision SDK 2.09
Hi, I am not sure if the NDK has any dependency based on SMP is enabled on bios or not. I can check with the NDK team and get back to you. As of now I don't think there is a patch available. Your issue might be because of driver dependency too. Did you try sending packets? Any observations? Regards, Anand
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Forum Post: RE: RTOS/TDA2HV: patch of A15 SMP NDK based on Vision SDK 2.09
hi Anand, i am trying to send packets, but will be blocking after several calling "send" API
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Forum Post: Linux/AM5718: DP83822 interface to GMAC SW0 AM5718
Part Number: AM5718 Tool/software: Linux Hi, I have taken a deviation from EVM by choosing DP83822I Ethernet PHY for a custom board. EVM uses KSZ9031 (RGMII) PHY , interfaced to CPSW. My requirement is to have 10/100 Ethernet port. I guess Driver support is available for DP83822I in linux. https://e2e.ti.com/support/legacy_forums/embedded/linux/f/354/t/621288 . Another thread points to issues with interfacing DP83822 to linux https://e2e.ti.com/support/legacy_forums/embedded/linux/f/354/t/621288 . In the custom board i need this Ethernet port active for uBOOT. Will there be driver support for uBoot?? I have a requirement to use this port for kernel update using TFTP. If the implementation is going to be troublesome ,I have an alternate option of using KSZ9031 in 10/100 mode. KSZ9031 data sheet point to the mechanism that can be adopted for this. Does the linux driver support this scheme?? Can I adopt this scheme to uBOOT?? Will there be driver support ?? so that device will power up and auto negotiate for 10/100 rather than 1G port.
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Forum Post: AM5728: OCMC RAM cache enable
Part Number: AM5728 Hi, I want to enable cache of the OCMC RAMs (DSP side). But according to the CorePac (sprugw0c) document, the OCMC RAMs region are in the shaded portion in the table that indicates MAR registers that are read-only. Are these OCMC RAMs cacheable? Please help me. Rishabh Garg in this thread is said that: "OCMC_RAM1 start address is 0x4030_0000 and size is 512 KB and hence cache will be enabled for full 0x4020_0000 to 0x4040_0000 region." Best regards, Omid
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