Forum Post: rare case: "Overflow detected on VIP0"
Dear Experts,We meet rare case.Sometimes we meet "Overflow detected on VIP0".We use FPGA to calculate the signal CRC error when "Overflow detected on VIP0" happens, but there is no CRC error.We try to...
View ArticleForum Post: RE: uPP software reset issue
Hi, Rajasekaran K Do I need tosupplytheclockalsouPPinitialization? Best regards,Chi
View ArticleForum Post: RE: RDK4 MJPEG Issue
Hello Badri,I am facing another issue as follow.Sometimes following assertion is coming.This occurs sometimes only, but I am not getting, why this assertion is coming. 0: SYSTEM: IPC init in progress...
View ArticleForum Post: RE: c6678 Messageq error "Error in Ipc_control...
Hi Rex,Tanks for your reply. I am using the same version of ipc, bios and xdc provided in the release notes. I am referring to the link...
View ArticleForum Post: RE: Can DM8168 encode 1080P30 H.264 bitstream,and bitrate down to...
Young,In general for 1080p30, 768Kbps is bit less and also the quality of the video encoding is totally content dependent. By the way what is your application? Few more Suggestions Instead of 30 fps go...
View ArticleForum Post: RE: Linux-c6x and TMDSEVM6472
Hi Rajasekaran K,I try to run Linux on this board using LinuxC6xWiki and latest version LINUX-MCSDK 02_00_00_63. I set SW1, SW2, Sw3 and flashed bootloader (bootblob) in accordance with the...
View ArticleForum Post: RE: channel at same hdvicp coprocessor is not working
Hi Badri,Thanks your response and try.We occur encode hang issue, log like below. Our 264 encode version is REL.500.V.H264AVC.E.IVAHD.02.00.02.02.Could you help us to resolved this issue?Thanks,Jacson...
View ArticleForum Post: Timer module of BIOS : TI 6618 Multicore
HiI wish to make two timers : 1) 120 ms, 2) 577 us (GSM Time slot) .Hence, I wrote following code for creation of 120 ms timer:Timer_Params timerParams; Timer_Handle myTimer;...
View ArticleForum Post: RE: LVDS LCD with DM8148 through Serialisier
Hi SteveThanks for your suggestions.While probing the DE line , the display actually stopped jittering. So adding a 100pf on the DE line 'fixed' the issue or did it?.......... Curiously, we noticed...
View ArticleForum Post: RE: How to combine MessageQ into NDK?
I am deeply sorry about that I do not know about the holiday schedule in U.S.Because the TI China's deyisupport forum is not very experienced on the NDK module, I wish to recieve your help on this...
View ArticleForum Post: Is there any thing difference between h264venc_ti_arm926.a and...
Hi.I use dm368 to encode YUV422 to h264 streaming.But I found VIDENC1_process() crash with error "alignment trap" after several hours.The dvsdk is :dvsdk_2_10_01_18.The h264 code version is...
View ArticleForum Post: RE: swms mosaic window display
hi Badri ,thanks for your help.i try the way you said .i have some other questions.for example,whether i can change the spacing line color?above that parameters can be set dynamiclly?
View ArticleForum Post: RE: Low FPS in 1080p60 422 video
Hi Abeesh,is this seen on TI EVM or custom board? Can you please share the data chain from capture to display? is this more of a Capture + preview only? OR Capture +...
View ArticleForum Post: RE: PCI on DM8148 EVM
Dennis,[quote user="Dennis McLeod"]Where is there a reset for PCIESS ??? I have not found anywhere that says how to bring the entire PCIESS in or out of reset[/quote]In DM814x datasheet, section 7.3...
View ArticleForum Post: RE: about AlgLink_ScdChPrm imageType
I am really thanks you!I will try it.by the way, can you extenal tell me what about detectionRateby default, detectionRate=8, is if this value=8, the frame data is valid, and if detectionRate=0, the...
View ArticleForum Post: RE: What are the timing requirements for the AUD_CLKIN1 pin (R5)...
To update this thread, based on internal mail communication, the timing requirements of DM814x AUD_CLKINx pins should be the same as the one provided in datasheet for J5Eco/DM811x device. The DM814x...
View ArticleForum Post: RE: M3 messages
hello hero badri,as your speaking, my log was shown as below[m3video] Queueing first frame in next IVA[0] [m3video] 17381: ENCODE: CH30: [m3video] Iva Map Change Serialization: First Frame of Next IVA...
View ArticleForum Post: RE: Dealing with NAND bad blocks in production programming
Well, TI never helped with this, and we noticed that the newer versions of firmware are even more sensitive to bad blocks. In fact, TI's instructions for loading newer versions of firmware include...
View ArticleForum Post: RE: assembly branch to C function link error
Aristo,It builds now, with the _ prefix. Does the code work as shown in this thread with that fix? Or are you debugging that now?My previous comments and questions still stand. You cannot mix ISR code...
View ArticleForum Post: RE: Separating ARM/Linux and DSP DDR Memory
Hi, Kjetil,Is the attachment in the thread, http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/307674.aspx, used for the test you mentioned here?Rex
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