Forum Post: RE: Bug in a certain serial of DM6446: RBL cannot run ubl in nand
can anyone confirm this bug? And how to read the SN like $NA-06A15FW ,$7C-ICA06HW?
View ArticleForum Post: RE: adaptive filter with IIR
thanks for thr help rahulFinallyI decidedto implement adaptive filter with FIR (LMS) ,I builtmy codebased on a adaptive filter lms code from c64xx Library.i attached my code...I puta music signl at the...
View ArticleForum Post: RE: Alternatives to bugg AISgen
Thanks for the reply. Your hints are just what I wanted.The detailed message is here, and after that there's the log file. It seems to contain the contents of the .ini file.The error message comes up...
View ArticleForum Post: RE: RE: AISgen installer for Linux
Thank you, but I still can't generate successfully the u-boot_ais.bin, I write:mono ./HexAIS_OMAP-L138.exe -ini 7853.OMAP-L138_ARM_nand_lcdk.ini -entrypoint 0xc1080000 ARM_AISExtra_OMAP-L138.out...
View ArticleForum Post: RE: Boot Splash Screen on the DM814X
Hi Clinton,My company also have a DM816x product that uses dvo2 as the primary display and needs u-boot to show a splash screen on dvo2. We already had a NDA with TI and can access the DM816x HDVPSS...
View ArticleForum Post: RE: Cycle count measuring on TMS320C6713
Jean-François,I can offer some comments, and you will probably get some more detailed helped from someone better able to help.a) You can have an unlimited number of software breakpoints in writable...
View ArticleForum Post: RE: c6678 interrupt problem
hi,ChadI have one image loaded into all the CorePacs, and every CorePac will execute the ISR, when one CorePac appear this Phenomenon,all the other core too.All CorePac share the same code in DDR3, and...
View ArticleForum Post: RE: Code loaded to DSP from PCIe bus is not running after magic...
Geraldine,The C6670 only has 4 cores, so you may be using a Target Configuration for the C6678 since you show 8 cores in the Debug window. I am surprised that it works this way, so CCS must be very...
View ArticleForum Post: RE: How to remove the reboot logo
Hi Faizel Now can display my own logo. thank you!!!! Eric
View ArticleForum Post: How to select the 32K oscillator input as clock source for the RTC
Hi,I have a custom DM8147 design where I need the RTC to be running from the external 1/32768 clock input (and not the internally generated CLKDIVIDER) where we have a more precise oscillator...
View ArticleForum Post: RE: dvr_rdk LCD display
Hi BrijeshI have a issue need your help, mention as below.I am able to capture video and display on the LCD, but the color isn't corrent, the red coloris look like blue. I capture the video frame and...
View ArticleForum Post: RE: question about uboot
after tracing, I found tiimage.hstruct ti_header {uint32_t image_size; uint32_t load_addr;};thanks.
View ArticleForum Post: data transmission failure at indefinite time from FPGA to...
there is a data transmission for 320*240*8 image bits with SRIO directIO from a FPGA to a TMS320C6657 DSP on my board, FPGA is in master,while DSP is in slaver , and SRIO on my board is connected...
View ArticleForum Post: RE: Question with RSTOUT_WD_OUT on DM8148
Hi Pavel :I appreciate your reply!I am a little confused about your description.0x0: RSTOUTn is asserted when a Watchdog Timer reset, POR, RESET, or Emulation/Software-Global Cold/Warm reset occurs0x1:...
View ArticleForum Post: RE: question about DM8168 DVR4.0 Cap encode link
HI,Badri Narayanan thanks for reply, now it's work fine,but i have some question about DVR demo,when i run demo like multichn encode or decode,board will be crash after a few second later,which...
View ArticleForum Post: DM8168 dvrrdk_03 decode 1600x1200 H264 stream report exception
Hi all The exception message: 1976890:!!!SLAVE CORE [VIDEO-M3] DOWN!!!SystemLink_copySlaveCoreExceptionContext:120mmap of [0xbe9c0000:36864]mmap virt addresss:0x2ab31000munmap of...
View ArticleForum Post: RE: Uart communication error on 6678
I am wondering if you spend too many cycles in the ISR that there is another interrupt event coming before clearing the previous event.Could you please refer to the ISR example in CIC user guide and...
View ArticleForum Post: RE: C6657 Software Pipeline
Pay,Your scheduled loop achieves 3 cycles for 8 samples. Your actual performance (2.139463/(8/3) is almost 80% of the theoretical performance. Taking into account the overhead of the loop itself,...
View ArticleForum Post: 8MP MJPEG encode on DM8127
Hi All,HW :DM8127 IPNCSW : ipnc_rdk V3.5. Sensor used : MT9J003 Till now, I am able to successfully set my custom path. i.e capture-->encode MJPEG Only -->SINGLE_STREAM...
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