Forum Post: C6678 PLL stat remains in GO

         We meet some problem for our new C6678 board.In the beginning we init the PLL:set PLLM,PLLDIV and so on,then set PLLCMD. But after that the PLLSTAT remains in "GO".

         We know the problem must come from the hardware.But now we need to wait sometime for it to be improved,we need to test some program in this situation.So I want to know:

         1. when this happen,how much the main pll output frequency is?how much the pll output to ddr/srio/hyperlink is?

         2.when this happen,is the rate of DDR/srio/hyperlink effected?Can we make DDR to 1000MHz,srio to 2.5G,hyperlink to 7.5G?

         3.when this happen,is any kind of error will occur when we use the IO interface?

          Thank you very much.