Forum Post: RE: C6748: EDMA missing interrupts

Hi Chris,

Thanks for your post.

This could be of some other issue. But basically, each master peripheral can be reprogrammed in the  Master Priority Registers (MSTPRI0-MSTPRI2) to assign an appropriate priority based on the application need and also the priority of each transfer controller's service requests. So that, DMA data transfer wouldn't be affected in any manner.

Regards,

Sivaraj K