Hi,
I have found in EDMA3 documentation for keystone devices RDRATE register for transfer controllers.
According to the documentation:
"The EDMA3 transfer controller issues read commands at a rate controlled by the read
rate register (RDRATE). The RDRATE defines the number of idle cycles that the read
controller must wait before issuing subsequent commands. This applies both to
commands within a transfer request packet (TRP) and for commands that are issued
for different transfer requests (TRs). For instance, if RDRATE is set to 4 cycles between
reads, there are 3 inactive cycles between reads.
RDRATE allows flexibility in transfer controller access requests to an endpoint. For an
application, RDRATE can be manipulated to slow down the access rate, so that the
endpoint may service requests from other masters during the inactive EDMA3TC
cycles."
I have set RDRATE to 32 cycles between reads by writing to appropriate memory address (for all TCs to be safe).
This doesn't change anything in our RTA Raw logs. Still access from DSP Core 0 waits
for the EDMA to finish for the same amount of time. This is really strange.
What else can I do ?
Best,
Paweł