Quantcast
Channel: Processors
Viewing all articles
Browse latest Browse all 125021

Forum Post: RE: C6727 Parallel Flash Boot, SDRAM, TISecondaryBoot and System Patch Issues

$
0
0

Shane,

Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages. Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics.

Your AIS file will generally have a series of SET commands that take care of certain peripheral initializations, especially the SDRAM init and speeding up the EMIF for the Flash (not required). This way, the patch code can safely sit in SDRAM or IRAM, whichever is most convenient for your application.

Most of the time, booting issues are related to peripherals that are not initialized properly. During CCS development with the emulator, a GEL script is usually connected through the Target Configuration and that GEL script takes care of all the system configuration of PLLs and peripherals. If any of that initialization is not done in the AIS SET commands or in the bootloaded code, there can be problems like what you describe.

There is a Wiki article on debugging boot problems. Please go to the TI Wiki Pages and search for "debug boot" (no quotes) to find this article with several helpful bits of advice.

The fact that you have no CRC errors and the code seems to match the Flash contents, that says you have the SDRAM initialized correctly.

The first step I would take is to disconnect the GEL script, load your program from CCS, and run it to confirm that it will work correctly from CCS-based load. If it runs okay but the Flash version does not, then there is something in the Flash init/bootload that is not getting initialized correctly.

The next step I would take is to disconnect the GEL script, load your program from CCS without running to main(), and capture the contents of IRAM and SDRAM into memory-save files. Then go through the boot process and capture the contents into another memory-save file so you can compare the two fully. It may be a pain getting through uninitialized data sections and unintialized holes at the end of loaded sections, so you may want to load as many 0's as you can into IRAM and SDRAM, if that is at all possible, or maybe there is a way to tell the linker to fill everything with 0's that it does not use.

Please let us know if any of this helps, or what results you get from some of these tests and from the Wiki article.

Regards,
RandyP


Viewing all articles
Browse latest Browse all 125021

Trending Articles



<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>