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Forum Post: RE: SPI Clock and Data lines routing / distribution to multiple slaves

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Thanks, Tom.  I appreciate your detailed feedback and suggestions!

Let me follow up to each of your points:

1.  I am looking at using clock buffers and trying to minimize the propagation delay.  Would zero delay buffers be acceptable to use?

2.  May I use the same clock fanout buffers to process the MOSI?  As for the MISO, I am considering using hex buffers with tri-state outputs (connecting all these outputs together and routing to the DSP).

3.  I will focus on managing this delay and try to keep the trace lengths as matched as possible.

Jeremy


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