Forum Post: PCIe from c6670 to FPGA (Altera's Cyclone V) - read from BAR0

Dear TI experts,

On my custom board, I have C6670 as RC and FPGA (Altera's Cyclone V) as EP. Link is up and I can read the Vendor ID and device ID. However, I cannot read content in BAR0.

Also, I connected tw EVMs and can communicate between them using BAR1, but not using BAR0.

In the "PCIe Use Cases for KeyStone Devices" (SPRABK8—December 2011) p. 10  BAR0 is dedicated to configuration space.

Please confirm whether I can read data from BAR0 in the FPGA and if so, please direct me to possible issues that I should recheck in my project.

Thanks, Alon.