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Forum Post: RE: EDMA poor performance L3/DDR OMAP-L138

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Hi Arya,

Thanks for your post.

As per system priority considerations, it is highly recommended that a TC servicing audio data requests from serial ports should be configured at a higher priority as compared to TC service memory to memory (paging/bulk) transfer requests. Please refer section 18.2.14.1 in the omapl138 TRM as below:

http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf

With the above strategy, it is obvious that, TC0 would set to high priority as you configure would meet real-time deadlines whereas, TC1 with lower system priority may not gurarantee in meeting your deadlines which is expected. Please look at the important note for omapl138 device as below:

Note: On previous architectures, the EDMA3TC priority was controlled by the QUEPRI register in the EDMA3CC memory-map. However for this device, the priority control for the transfer controllers is controlled by the chip-level registers in the System Configuration Module.

Also, there are other constraints will have the possibility of being locked out from accessing the EMIFA by a stream of higher priority requests. Therefore, care should be taken when issuing persistent requests to theEMIFA from a source such which is a high priority requester. Please check whether this case applicable to your design and for more details, please refer section 20.2.13.2 in the above omapl138 TRM.

Thanks & regards,
Sivaraj K

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