Can you clarify if this is a test between 6657 EVM and 6678 EVM? What is the test code based for? ti\pdk_C6657/78_1_1_2_6\packages\ti\drv\pcie\example\sample?
Something to check:
-- if PCIE is GEN2 with 2 lanes
- DSP main PLL is 1.0 GHz or not
The calculation you need to consider the 24 bytes header for each 4 bytes transfer and 8/10 bit encoding, but the results is still too low.
Regards, Eric