Hello Pubesh,
I would be lucky, if this will be so obviously and simply. As you may know for the 4-pin mode the following pin combinations are only possible: DX, DR, CLKX or CLKR and FSX or FSR – in total 4. If CLK and FS signals are external, then the CLKR signal should serve also the CLKX pin (or vice versa) as well as the FSR signal should also serve the FSX pin (or vice versa).
In case of the McASP these connections will be established internally, clearing ASYNC (ACLKXCTL.6) bit , while in the McBSP these connections are possible in the DLB mode only. Please refer the Figure 26-2 Clock and Frame Generation at OMAP-L138 TRM (spruh77) to find more details.
I can think of CLKG signal as a CLKR/X signal, where SCLKME, CLKSM = 1 and CLKGDV = 0, but I can’t imagine the same trick with the FSG. Please refer the section 26.2.5.2 Sample Rate Generator Clocking and Framing at OMAP-L138 TRM (spruh77) to find more details.
If you aren’t agree with my argumentation or/and have already experience, please provide me with the needed specific settings of PCR and SRGR registers.
Kindly
GenPol