Hi Sivagamy,
Thank you for your reply. I tried to follow your advices and to do further examination on my board.
1. Yes, we noticed that design constraints and take them in to consideration when designing the PCB.
2. Via the CCSv5 and XDS100v2, I run the DDR3stressTest testcases within DDR0/1 for 1000 times and get no excepted data:
[CortexA8] Select one of the DDR controller to perform stress
0 : For DDR0
1 : For DDR1
0
DDR START ADDR is 0x80000000
Select one of the options for DDR Size
0 : 16 MB
1 : 32 MB
2 : 64 MB
3 : 128 MB
4 : 256 MB
5 : 512 MB
6 : 1024 MB
7 : 2048 MB
6
The test case passed 5 times
The test case passed 10 times
The test case passed 15 times
The test case passed 20 times
The test case passed 25 times
The test case passed 30 times
The test case passed 35 times
The test case passed 40 times
The test case passed 45 times
The test case passed 50 times
The test case passed 55 times
The test case passed 60 times
The test case passed 65 times
The test case passed 70 times
The test case passed 75 times
The test case passed 80 times
The test case passed 85 times
The test case passed 90 times
The test case passed 95 times
The test case passed 100 times
The test case passed 105 times
0 : For DDR0
1 : For DDR1
0
DDR START ADDR is 0x80000000
Select one of the options for DDR Size
0 : 16 MB
1 : 32 MB
2 : 64 MB
3 : 128 MB
4 : 256 MB
5 : 512 MB
6 : 1024 MB
7 : 2048 MB
6
The test case passed 5 times
The test case passed 10 times
The test case passed 15 times
The test case passed 20 times
The test case passed 25 times
The test case passed 30 times
The test case passed 35 times
The test case passed 40 times
The test case passed 45 times
The test case passed 50 times
The test case passed 55 times
The test case passed 60 times
The test case passed 65 times
The test case passed 70 times
The test case passed 75 times
The test case passed 80 times
The test case passed 85 times
The test case passed 90 times
The test case passed 95 times
The test case passed 100 times
The test case passed 105 times
...
The test case passed 970 times
The test case passed 975 times
The test case passed 980 times
The test case passed 985 times
The test case passed 990 times
The test case passed 995 times
The test case passed 1000 times
The test case passed 975 times
The test case passed 980 times
The test case passed 985 times
The test case passed 990 times
The test case passed 995 times
The test case passed 1000 times
...
For DDR1 controller, the testcase runs with no excepted data as well.
3. I would like to share my logs, which were dumped from the serial terminal:
(Please visit the site to view this file)
(Please visit the site to view this file)
(Please visit the site to view this file)
(Please visit the site to view this file)
4. I don't want to swap the samples now... Maybe I would resolder another new DM8168 CPU to board #2.
Naroah
Dec/03/2013