Where can I find more documentation on the exact behaviour of DEEPSLEEP?
I've carefully read the SPRUFG5A (ARM Subsystem User's Guide) section 12.5 which mostly describes HOW to activate DEEPSLEEP, but info on what exactly happens during DEEPSLEEP is scarce. Basically all I've found is a few sentences:
"Deep sleep mode is a special power down mode in which all device clocks are stopped and the internal oscillators are powered down. Registers and software states are preserved and upon recovery, the program may continue from where it left off with minimal overhead involved."
But the subsequent instructions seems to indicate that e.g. the "PLL cores" are not affected by DEEPSLEEP. Furthermore it seems that the ARM core also is unaffected. Where can I confirm this?
The reason I'm asking is problems with the DDR2 memory when waking-up from DEEPSLEEP. Executing/reading from DDR2 fails when DEEPSLEEP has completed, even if "self-refresh" was enabled during DEEPSLEEP.
