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Forum Post: RE: AM3352: AM3352 and TPS65910A3A1RSL

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[quote userid="607193" url="~/support/processors-group/processors/f/processors-forum/1364327/am3352-am3352-and-tps65910a3a1rsl/5278033#5278033"] What do you mean by other ICs? Both devices you quote seems to be Rev B. I didnt mention another IC, but I mentioned another batch IC (another date code). [/quote] Thank you for clarifying. FYI, i highlighted the previous note AM335 ICs that reported RTC reset issue have top marking as Rev B, but it behaving like Revision A (RTC reset issue occurred). Where as other IC batches with top marking as Rev B itself does not show RTC reset issue. [quote userid="607193" url="~/support/processors-group/processors/f/processors-forum/1364327/am3352-am3352-and-tps65910a3a1rsl/5278033#5278033"] Please point me to the document that says Rev A has RTC reset issue. Ex Errata Refer Advisory 1.0.5 mentioning that RTC issue is affecting SILICON REVISION 1.0. [/quote] Advisory 1.0.5 RTC: 32.768-kHZ Clock is Gating Off. I cant see the power consumption or reset issue mentioned if that is what you are indicating. Dose customer have the suggested fix implemented as per SR1 silicon for SR2..2.1 - this is not required? Workaround Do not turn off the VDD_CORE power source or source a logic low to the PWRONRSTn input while expecting RTC to keep an accurate time. Do not enable the de-bounce circuit on the EXT_WAKEUP input if an external wakeup event needs to be detected while the 32.768-kHz clock is gated. The current silicon revision is 2.1 and i am not sure how this correlates to revision 1.0 [quote userid="607193" url="~/support/processors-group/processors/f/processors-forum/1364327/am3352-am3352-and-tps65910a3a1rsl/5271445#5271445"]Since the top marking is not reliable (as mentioned above), we need to identify whether the IC batch used is Rev A or B by other means, Example from date code or from internal die marking. That is why asked for information regarding release date and die markings of Revision A(2.0) and B(2.1).[/quote] I am not sure how you have been able to conclude the top marking is unreliable. I do not have this information available and i am not sure on the applicability. We are trying to resolve a wrong PMIC usage through AM335x. Please reach out to the Marketing/Business development team mentioning the issue and the required information. Regards, Sreenivasa

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